TRANSDUCERS 2009 - 2009 International Solid-State Sensors, Actuators and Microsystems Conference 2009
DOI: 10.1109/sensor.2009.5285530
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CMOS-compatible three dimensional buried channel technology (3DBCT)

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Cited by 6 publications
(3 citation statements)
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“…By using alternative silicon wafer bonding techniques it may be possible to integrate the cooling channels directly into the active silicon and avoid the thermal barrier of the glue layer. For this, low temperature bonding is being investigated, to enable the etched wafer to be directly bonded to the active silicon, or alternatively the technique of buried microchannels may be used, whereby channels are anisotropically etched into the back of a CMOS sensor in a post processing step [38,39]. Finally, for those applications in extremely intense environments where there may be high power consumption in tandem with a need to keep the irradiated sensors at very low temperatures, a move to an alternative coolant such as krypton may be necessary to access lower temperatures for the coolant.…”
Section: Discussionmentioning
confidence: 99%
“…By using alternative silicon wafer bonding techniques it may be possible to integrate the cooling channels directly into the active silicon and avoid the thermal barrier of the glue layer. For this, low temperature bonding is being investigated, to enable the etched wafer to be directly bonded to the active silicon, or alternatively the technique of buried microchannels may be used, whereby channels are anisotropically etched into the back of a CMOS sensor in a post processing step [38,39]. Finally, for those applications in extremely intense environments where there may be high power consumption in tandem with a need to keep the irradiated sensors at very low temperatures, a move to an alternative coolant such as krypton may be necessary to access lower temperatures for the coolant.…”
Section: Discussionmentioning
confidence: 99%
“…For microchannels realized in polymer substrates that cannot tolerate temperatures higher than 300 • C, sealing can be achieved by ultrasonic bonding [4], or by using photopolymers [5]. On the other hand, for microchannels defined in a silicon substrates containing temperature sensitive device, depositing low stress dielectric material using plasma enhanced chemical vapor deposition (PECVD) has been proposed for reducing the sealing thermal budget [6,7].…”
Section: Introductionmentioning
confidence: 99%
“…The main techniques for the fabrication of silicon microchannels can be grouped as: (i) bulk micromachining usually in combination with wafer bonding [1], [5], [11], [12], (ii) buried channel technology (BCT) [1], [13]- [16], and (iii) surface micromachining [2], [13], [17]- [19].…”
mentioning
confidence: 99%