CMOS metal replacement gate transistors using tantalum pentoxide gate insulator

Chatterjee, Amitava; Chapman, R. A.; Joyner, K.; Otobe, Masanori; Hattangady, S. V.; Bevan, M. J.; Brown, George; Yang, Hsiwen; He, Qizhi; Rogers, D.; Fang, Sunny; Kraft, R.; Rotondaro, Antonio; Terry, Mason L.; Brennan, K.; Aur, S.; Hu, Jerry C.; Tsai, Huan‐Liang; Jones, Patrick J.; Wilk, G. D.; Aoki, Masamitsu; Rödder, M.; Chen, I.-C.

doi:10.1109/iedm.1998.746471

Cited by 52 publications

(5 citation statements)

References 8 publications

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“…However, when the film was deposited from the mixture of SiH 4 (or Si 2 H 6 ) and PDMAT, the carbon incorporation strength was almost the same as that of Si in the film. These results suggested that the major chemical state of carbon would be as volatile molecules after the reaction of NH 3 and PDMAT. On the other hand, a large amount of carbon would be deposited as a film component from the gas phase reaction of SiH 4 (or Si 2 H 6 ) and PDMAT.…”

Section: Resultsmentioning

confidence: 92%

Composition Control of TaSixNy Thin Films by Chemical Vapor Deposition for Future n-MOSFET Metal Gate Electrode

2006

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TaSixNy has been examined as a metal gate material for n- MOSFETs of the future. In order to control the composition of the TaSixNy film, a CVD method has been newly developed, using a commercial-based 300mm machine. The CVD film composition can be modified by stacking alternate depositions of TaN and Si. The effective workfunction of the gate electrode can be adjusted through the average composition of the TaSixNy. Excellent transistor characteristics have been confirmed, using HfSiON gate dielectric and a TaSixNy gate electrode.

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Section: Resultsmentioning

confidence: 92%

Composition Control of TaSixNy Thin Films by Chemical Vapor Deposition for Future n-MOSFET Metal Gate Electrode

2006

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“…In sub 0.1um MOS device, it requires new high-K materials as gate dielectrics which can prevent tunneling and reduce the direct tunneling current due to the higher dielectric constants [2]. During various high-K materials, silicon nitride is in common use and already have mature manufacturing methods, whose dielectric constant K=7,which is larger than silica's(K=3.9).It indicates that silicon nitride will be the key research of gate dielectric materials in the next few years [3].…”

Section: Introductionmentioning

confidence: 99%

The Study of Direct Tunneling Current in Strained MOS Device with Silicon Nitride Stack Gate Dielectric

Zhang

et al. 2011

AMM

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As the size of MOS device scaled down to sub 100nm, the direct tunneling current of gate oxide increases more and more. Using silicon nitride as gate dielectric can solve this problem effectively in some time due to the dielectric constant of silicon nitride is larger than silica’s.This paper derived the dielectric constant of silicon nitride stack gate dielectric,and simulated the direct tunneling current of strained MOS device with silica and silicon nitride gate dielectric through device simulation software ISE TCAD10.0,studied the direct tunneling current of strained MOS device with silicon nitride stack gate dielectric change with the variation of some parameters and the application limit of silicon nitride material.

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“…The processing temperatures depend on the integration scheme used to implement the gate metal material. A ''gate last'' integration scheme would be the least aggressive with maximum processing temperatures of less than 600°C, 12 whereas a conventional integration scheme would be the most aggressive because the gate would be in place during the 1000°C several second anneal to activate the dopants in the source/drain regions. Other important criteria in the choice of a gate metal material include the ease of hydrogen diffusion through the material for dielectric interface passivation 13,14 and the deposition method.…”

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confidence: 99%

Evaluation of Thermal Stability for CMOS Gate Metal Materials

Cabral

Lavoie

Özcan

et al. 2004

J. Electrochem. Soc.

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We present an evaluation of the thermal stability for various elemental metals and binary/ternary conducting compounds on gate dielectrics. The continued scaling of polysilicon gated complementary metal oxide semiconductor ͑CMOS͒ devices may face limitations such as polydepletion, incompatibility with some high-k dielectrics, high series resistance, and boron penetration. In this study, 24 different elemental metals and metallic compounds with work functions ranging from 4.0 to 5.2 eV covering n-type field effect transistor ͑nFET͒, midgap, and pFET gate electrodes were examined. The films were characterized during rapid thermal annealing in a forming gas ambient up to 1000°C. Three techniques, in situ X-ray diffraction, resistance, and elastic light scattering analysis were used simultaneously during annealing. It was found that many of the elemental materials, especially those with nFET work functions, undergo reactions with the SiO 2 and Al 2 O 3 gate dielectrics, while others became unstable because of melting ͑Al͒ or agglomeration ͑Co, Ni, Pd and CoSi 2 ). Two binary compounds, W 2 N and RuO 2 , underwent dissociation in the hydrogen-containing ambient. Materials stable above 700°C include Mo, W, Re, Ru, Co, Rh, Ir, Pd, Pt, W 2 N, TaN, TaSiN, and CoSi 2 , making them possible choices for integration involving higher temperature processing.Continued scaling of the gate length and gate oxide thickness of complementary metal oxide semiconductor ͑CMOS͒ transistors for higher performance and increased circuit density has reached a point where a number of issues have arisen. The potentially major issues include high gate tunneling leakage current, 1,2 polysilicon ͑poly-Si͒ gate depletion, 3 high gate resistance, 3 boron diffusion into the dielectric for pFETs, 4 poly-Si incompatibility with some high-k dielectrics, 5 and reliability.Many of these issues may be lessened or eliminated by replacing the poly-Si gate with a metal gate. Current state-of-the-art ultrathin gate oxynitride dielectrics show a continued increase in leakage current even though additional nitrogen incorporation has mitigated this to some extent. 6 Thinning the gate oxide further may not be practical, but there is an additional way to decrease the electrical thickness and thus increase CMOS performance. Three components make up the electrical thickness ͑capacitance͒ of the gate stack: the contribution from the Si substrate ͑due to the quantum mechanical effect͒, the dielectric layer itself, and the carrier depletion layer in the poly-Si formed when the field effect transistor ͑FET͒ device is turned on. 7 Replacement of the poly-Si gate with a metal gate eliminates the depletion and thus decreases the electrical thickness by the SiO 2 equivalent of 0.3-0.5 nm, without a substantial increase in leakage. 3 This also decreases the gate resistivity ͑the decrease depends on the choice of material͒ from that of 1-3 m ⍀ cm typical for the doped poly-Si. 8 For example, a CoSi 2 gate has a resistivity of 15-20 ⍀ cm, about two orders of magnitude less than...

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CMOS metal replacement gate transistors using tantalum pentoxide gate insulator

Cited by 52 publications

References 8 publications

Composition Control of TaSixNy Thin Films by Chemical Vapor Deposition for Future n-MOSFET Metal Gate Electrode

Composition Control of TaSixNy Thin Films by Chemical Vapor Deposition for Future n-MOSFET Metal Gate Electrode

The Study of Direct Tunneling Current in Strained MOS Device with Silicon Nitride Stack Gate Dielectric

Evaluation of Thermal Stability for CMOS Gate Metal Materials

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