Comparative Growth Kinetics Of Sige In A Commercial Reduced Pressure Chemical Vapour Deposition Epi Reactor And Anomalies During Growth of Thin Si Layers on Sige

Caymax, M.; Loo, Roger; Brijs, Bert; Vandervorst, Wilfried; Howard, David; Kimura, Kenji; Nakajima, K.

doi:10.1557/proc-533-339

Cited by 8 publications

(4 citation statements)

References 3 publications

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“…Figure 2(b) also shows the influence of the Ge content on the Si growth rate. The 2.4 times higher Si growth rates as observed for 30% Ge in the channel are well in line with the previous results obtained on blanket wafers [12]. As mentioned before, the influence of the underlying SiGe disappears if Si growth proceeds and the Si growth rate goes to the same value for all Ge contents in the channel.…”

Section: Si Growth On Sigesupporting

confidence: 92%

“…The Si growth rate increases as a function of the Ge content of the underlying layer. This effect has also been reported for non-selective epitaxial Si on SiGe growth on blanket wafers [12]. It is explained by the lower binding energy for Ge-Cl and Ge-H in comparison to Si-Cl and Si-H bounds and some intermixing of the Si and Ge on the growing surface.…”

Section: Si Growth On Sigesupporting

confidence: 69%

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Selective epitaxial Si/SiGe growth forV_Tshift adjustment in highkpMOS devices

Loo

Sorada

Inoue

et al. 2006

Semicond. Sci. Technol.

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Downscaling of classical metal oxide semiconductor (MOS) devices resulted in a need to replace the gate oxide by high k dielectrics to keep the gate leakage under control. However, new device issues such as an uncontrollable shift in the threshold voltage in p-type MOS devices and a reduction in channel mobility were encountered. These issues can be overcome by the implementation of buried strained SiGe channels, grown by selective epitaxial growth, as demonstrated in this paper. The optimized high k gate fabrication scheme starts with the growth of a very thin oxide layer. Therefore, a Si cap layer is required because oxidation of SiGe leads to defects at the gate/channel interface. The Si growth rate is influenced by the underlying SiGe layer, during the deposition of the first atomic layers. Nevertheless, accurate thickness control of the Si cap is possible. The minimal required Si cap thickness and its dependence on Ge content in the underlying SiGe channel, for making high-quality dielectrics and maintaining low capacitive equivalent thickness, is extracted from charge pumping measurements, CV measurements and energy dispersive x-ray spectroscopy measurements. Device results demonstrate the successful implementation of buried SiGe channels in pMOS devices with high k gate dielectrics.

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Section: Si Growth On Sigesupporting

confidence: 92%

Section: Si Growth On Sigesupporting

confidence: 69%

Selective epitaxial Si/SiGe growth forV_Tshift adjustment in highkpMOS devices

Loo

Sorada

Inoue

et al. 2006

Semicond. Sci. Technol.

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“…For this purpose two batches of low temperature Chemical Vapor Deposited (CVD) [4] Boron doped layers have been grown with a dopant level of about 2x10 19 at/cm 3 and with thicknesses ranging from 132 down to 2 nm (table I). The Reduced Pressure Chemical Vapor Deposition (RP-CVD) system used in this work is a standard ASM Epsilon 2000 production epi reactor.…”

Section: Structuresmentioning

confidence: 99%

Accurate Sheet Resistance Measurement on Ultra-Shallow Profiles

et al. 2006

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The accurate and reliable characterization of the sheet resistance of ultra-shallow (USJ) profiles is a key issue in the development of future CMOS technologies. Typically, conventional means, such as in-line four point probe measurements, have a limited accuracy due to the substrate contribution resulting from too much probe penetration, especially in the presence of highly doped underlying layers (such as well/halo-profiles). In this work, a series of advanced Boron doped layers (132 nm down to 2 nm) have been grown with Chemical Vapor Deposition (CVD) on medium and lowly doped substrates and have been characterized with a large variety of state-of-the art non-penetrating/non-contact sheet resistance tools.

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“…Both causes for loading effects can be important, as deposition rate is dependent on gas phase concentration as well as on temperature. 43 Furthermore, the chemical and thermal loading effects can interfere with each other. For example, thermal loading leads to a modification of the growth temperature.…”

Section: Loading Effectsmentioning

confidence: 99%

Successful Selective Epitaxial Si[sub 1−x]Ge[sub x] Deposition Process for HBT-BiCMOS and High Mobility Heterojunction pMOS Applications

Loo

Caymax

Peytier

et al. 2003

J. Electrochem. Soc.

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Si 1Ϫx Ge x /Si heterostructures are useful for numerous device applications where device performance is improved by band offsets and/or increased carrier mobility. The use of selective epitaxial growth for the implementation of Si 1Ϫx Ge x has some advantages compared to a nonselective growth process. However, some issues such as thickness nonuniformity ͑microloading on a micrometer scale and gas depletion on a wafer scale͒ and facet formation must be solved. In this paper, we give a detailed overview of our selective Si 1Ϫx Ge x growth process in a standard production-oriented chemical vapor deposition system for Ge contents between 0 and 32%. Our process allows layer deposition with no pattern dependence of the growth rate and Ge content ͑no microloading͒ and with a wafer scale layer nonuniformity that is better than the accuracy of the measurement techniques (ϳ2%). Facet formation was avoided by choosing the correct growth conditions and by preventing lateral growth over the mask material. Selective epitaxial layers did not show a degradation of photoluminescence characteristics. The layer quality is further demonstrated by the performance of Si 1Ϫx Ge x heterojunction bipolar transistors ͑0.35 and 0.25 m technology͒, and p-type Si 1Ϫx Ge x heterojunction metal oxide semiconductor devices ͑effective gate length down to 70 nm͒.

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Comparative Growth Kinetics Of Sige In A Commercial Reduced Pressure Chemical Vapour Deposition Epi Reactor And Anomalies During Growth of Thin Si Layers on Sige

Cited by 8 publications

References 3 publications

Selective epitaxial Si/SiGe growth forV_Tshift adjustment in highkpMOS devices

Selective epitaxial Si/SiGe growth forV_Tshift adjustment in highkpMOS devices

Accurate Sheet Resistance Measurement on Ultra-Shallow Profiles

Successful Selective Epitaxial Si[sub 1−x]Ge[sub x] Deposition Process for HBT-BiCMOS and High Mobility Heterojunction pMOS Applications

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Comparative Growth Kinetics Of Sige In A Commercial Reduced Pressure Chemical Vapour Deposition Epi Reactor And Anomalies During Growth of Thin Si Layers on Sige

Cited by 8 publications

References 3 publications

Selective epitaxial Si/SiGe growth forVTshift adjustment in highkpMOS devices

Selective epitaxial Si/SiGe growth forVTshift adjustment in highkpMOS devices

Accurate Sheet Resistance Measurement on Ultra-Shallow Profiles

Successful Selective Epitaxial Si[sub 1−x]Ge[sub x] Deposition Process for HBT-BiCMOS and High Mobility Heterojunction pMOS Applications

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Product

Resources

About

Selective epitaxial Si/SiGe growth forV_Tshift adjustment in highkpMOS devices

Selective epitaxial Si/SiGe growth forV_Tshift adjustment in highkpMOS devices