Comparative study and optimization of synchronous and asynchronous comparators at near-threshold voltages

Kim, Sung Justin; Kim, Doyun; Seok, Mingoo

doi:10.1109/islped.2017.8009169

Cited by 16 publications

(7 citation statements)

References 9 publications

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“…Initial analysis has been performed by modelling the fast output pulse at the comparator's input to determine parameters such as input rise time, input capacitance, and AC coupling capacitor value. The comparator is a self-biased differential amplifier, a modified version of [12], whereas the concept was introduced in [13] and [14]. A preamplifier stage is needed in order to increase the absolute threshold resolution with respect to the non-amplified input signal range.…”

Section: A Preamplifiermentioning

confidence: 99%

Blumino: The First Fully Integrated Analog SiPM With On-Chip Time Conversion

Muntean

Venialgo

Ardelean

et al. 2021

IEEE Trans. Radiat. Plasma Med. Sci.

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Blumino is the first analog silicon photomultiplier with integrated amplifier, comparator and time-to-digital converter. The combination of a photodetector together with onchip readout circuitry enables system-level advantages such as internal parasitic reduction, compactness and simplicity. The analog silicon photomultiplier has a third output, called fast terminal, in addition to the anode and cathode, which is used for timing measurements. The analog silicon photomultiplier presents excellent photon detection efficiency greater than 40% at 420nm, making it suitable for positron-emission tomography. Measurement results of the time-to-digital converter indicate a resolution of 128ps LSB with a differential non-linearity and integral non-linearity of -1/+5LSB and -2.4/+0.9LSB, respectively.The discriminator comprises two preamplifier stages followed by a complementary self-biased differential amplifier stage which is coupled to the analog silicon photomultiplier's fast terminal through a decoupling capacitor. The sensor is also fully backwardcompatible through the standard output which can be coupled to dedicated ASICs and standard readout integrated circuits. In addition to the electrical, radiation and optical performance, the integration of a custom CMOS analog silicon photomultiplier process with standard CMOS process was investigated.

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Section: A Preamplifiermentioning

confidence: 99%

Blumino: The First Fully Integrated Analog SiPM With On-Chip Time Conversion

Muntean

Venialgo

Ardelean

et al. 2021

IEEE Trans. Radiat. Plasma Med. Sci.

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“…Hence, it is advised to adjust the speed of the hysteresis comparator in a different phase. The hysteresis comparator is implemented with the comparator architecture of [5] by comparing it with a reference voltage. In our design, the low-speed comparator is accomplished by stacking the smallest size transistors, while the high-speed comparator is designed with normal size transistors.…”

Section: B Power Gating Hysteresis Comparatormentioning

confidence: 99%

“…The input resistance of the converter is expressed in (5), where L is the inductance, T is the energized time, and F is the switching frequency of the inductor, respectively.…”

Section: (4)mentioning

confidence: 99%

An Event-Driven Multi-Input Multi-Output BuckBoost Converter with Adaptive MPPT for Wide Power Range RF Energy Harvesting

Liang

Yuan

2021

2021 IEEE International Symposium on Circuits and Systems (ISCAS)

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This paper proposes a buck-boost converter that is event-driven multi-input multi-output (EDMIMO). The adaptive maximum power point tracking (MPPT) is achieved by utilizing a linear search of fraction open-circuit voltage (FOCV)and the wide power range operation is accomplished by applying binary search of power switch size. The net output power of the converter is measured by considering the conduction loss, switching loss, and control circuit power dissipation. The proposed converter is implemented in a 180 nm TSMC CMOS process. The input power range is from -24 dBm to 6 dBm with a dynamic range of 1000X. The MPPT efficiency is higher than 95% and the power conversion efficiency is more than 73% with a peak of 85% over the entire input power range. Keywords-event-driven, multi-input multi-output (MIMO), adaptive maximum power point tracking (MPPT), wide power range, RF energy harvesting.I.

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“…The Asynchronous comparator is based on a near-threshold topology [7]. A preamplifier stage, as shown in Fig.…”

Section: System Architecturementioning

confidence: 99%

“…The actual comparator comprises two stages: the first stage (Fig. 2b) is a self-biased preamplifier, which is a modified version of the CSDA that is able to operate in near threshold regions [7] [8], while the second stage (Fig. 2c) consists of a conventional CSDA followed by inverter stages.…”

Section: System Architecturementioning

confidence: 99%

A Fully Integrated State-of-the-Art Analog SiPM with on-chip Time Conversion

Muntean

Sachdeva

Venialgo

et al. 2018

2018 IEEE Nuclear Science Symposium and Medical Imaging Conference Proceedings (NSS/MIC)

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In this work, we present a complete design implementation and characterization of an analog silicon photomultiplier (SiPM) with integrated time-to-digital converter (TDC). The combination of a photodetector together with on-chip readout circuitry in close proximity enables system-level advantages such as internal parasitic reduction for better singlephoton timing resolution (SPTR), but also overall simplicity and compactness. The system comprises a C-Series analog SiPM developed by SensL, a TDC, and a comparator. The design was implemented in 0.35µm CMOS technology. The proposed analog SiPM features 48% photon detection efficiency (PDE) at 420nm wavelength and +6.0V excess bias. Thanks to the small size of the electronics, the overall sensor fill factor is 75% and its sensitive area is 3×3mm 2. The SiPM fast output, which is a specialized terminal for fast timing output signals, has a parasitic capacitance of about 12pF. The TDC is a multi-path-gated ring oscillator with a 6-bit coarse counter and 9-bit phase detector. Post-layout simulation results indicate a 65ps LSB in typical corner with differential non-linearity (DNL) and integral non-linearity (INL) of ±0.55LSB and ±1LSB, respectively. The comparator is composed of two preamplifier stages followed by a complementary self-biased differential amplifier stage (CSDA), directly coupled to the fast output through a capacitor. Post-layout simulation indicates 48V/ns slew rate and a preamplifier stage bandwidth of ~1GHz. The comparator power consumption without the additional preamplifier stage is 198µW.

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Comparative study and optimization of synchronous and asynchronous comparators at near-threshold voltages

Cited by 16 publications

References 9 publications

Blumino: The First Fully Integrated Analog SiPM With On-Chip Time Conversion

Blumino: The First Fully Integrated Analog SiPM With On-Chip Time Conversion

An Event-Driven Multi-Input Multi-Output BuckBoost Converter with Adaptive MPPT for Wide Power Range RF Energy Harvesting

A Fully Integrated State-of-the-Art Analog SiPM with on-chip Time Conversion

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Comparative study and optimization of synchronous and asynchronous comparators at near-threshold voltages

Cited by 16 publications

References 9 publications

Blumino: The First Fully Integrated Analog SiPM With On-Chip Time Conversion

Blumino: The First Fully Integrated Analog SiPM With On-Chip Time Conversion

An Event-Driven Multi-Input Multi-Output Buck­Boost Converter with Adaptive MPPT for Wide Power Range RF Energy Harvesting

A Fully Integrated State-of-the-Art Analog SiPM with on-chip Time Conversion

Contact Info

Product

Resources

About

An Event-Driven Multi-Input Multi-Output BuckBoost Converter with Adaptive MPPT for Wide Power Range RF Energy Harvesting