2011 IEEE International Symposium of Circuits and Systems (ISCAS) 2011
DOI: 10.1109/iscas.2011.5937549
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Comparator-based switched-capacitor pipelined ADC with background offset calibration

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Cited by 6 publications
(1 citation statement)
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“…Recently, several techniques have been developed to alleviate the finite gain error of op-amps in SC circuits, such as comparator-based SC (CBSC) circuits [11,12], digital circuits-based SC circuits, which are also called zero-crossing-detectors-based (ZCD) SC circuits [13][14][15] and digital calibration algorithms [16][17][18]. However, CBSC circuits introduce large offset errors and linearity problems due to the output overshoots and voltage drop on switches [19]. Furthermore, these digital techniques are more complicated than switched-capacitor techniques, which have been proposed to increase the effective gain of op-amps, such as correlated level shifting (CLS) [20], cross-coupling CLS [21], sequential-CLS [22], charge-compensated CLS [23], and averaging-CLS [24].…”
Section: Introductionmentioning
confidence: 99%
“…Recently, several techniques have been developed to alleviate the finite gain error of op-amps in SC circuits, such as comparator-based SC (CBSC) circuits [11,12], digital circuits-based SC circuits, which are also called zero-crossing-detectors-based (ZCD) SC circuits [13][14][15] and digital calibration algorithms [16][17][18]. However, CBSC circuits introduce large offset errors and linearity problems due to the output overshoots and voltage drop on switches [19]. Furthermore, these digital techniques are more complicated than switched-capacitor techniques, which have been proposed to increase the effective gain of op-amps, such as correlated level shifting (CLS) [20], cross-coupling CLS [21], sequential-CLS [22], charge-compensated CLS [23], and averaging-CLS [24].…”
Section: Introductionmentioning
confidence: 99%