Comparison of lateral EST and IGBT devices on SOI substrates

Analysis on the off-state design and characterization of LIGBTs in partial SOI technology

“…However, there are some inherent weaknesses in the structure of the SOI LIGBT [2][3][4][5] such as self heating and limitation of breakdown voltage (BV) by buried oxide (BOX) thickness. The partial SOI (PSOI) concept was subsequently proposed [6,7] featured with devices sitting on a SOI wafer but the voltage can be partly supported by the handle wafer to suppress the crowding of the potential lines in the confined silicon and to reduce self-heating in SOI technology.…”

Vertical Gate RF SOI LIGBT for SPICs with Significantly Improved Latch-Up Immunity

“…Silicon-on-insulator (SOI) lateral insulated gate bipolar transistor (LIGBT) has been widely used in smart power integrated circuits (SPICs) because of its high input impedance, low on-resistance, low forward voltage drop, high breakdown voltage, and compatibility with CMOS technologies [1][2][3][4][5][6][7][8][9][10][11][12][13][14][15][16][17][18][19][20]. SOI technology has been exhibiting more and more importance in the field of high-voltage integrated circuits (HVICs) and SPICs.…”

“…When the voltage drop grows sufficient to turn the vertical NPN transistor on at any point, the minimum regener]ative feedback couple condition of the parasitic dual-transistors is satisfied and the parasitic thyristor latches up in a very short time. Gate control cannot be recovered until anode current falls below its holding current and it is very harmful to the device itself and the corresponding SPICs and HVICs [1][2][3][4][5][6][7][8][9][10][11][12][13][14][15][16].…”