Comprehensive Capacitance–Voltage Simulation and Extraction Tool Including Quantum Effects for High-k on Si&lt;italic&gt;x&lt;/italic&gt;Ge1−&lt;italic&gt;x&lt;/italic&gt; and In&lt;italic&gt;x&lt;/italic&gt;Ga1−&lt;italic&gt;x&lt;/italic&gt;As: Part I—Model Description and Validation

Surface passivation is a widely used technique to reduce the recombination losses at the semiconductor surface. The passivating layer performance can be mainly characterized by two parameters: The fixed charge density (Q ox) and the interface trap density (D it) which can be extracted from Capacitance-Voltage measurements (CV). In this paper, simulations of High-Frequency Capacitance-Voltage (HF-CV) curves were developed using simulated passivation parameters in order to examine the reliability of measured results. The D it was modelled by two different sets of functions: First, the sum of Gaussian functions representing different dangling bond types and exponential tails for strained bonds. Second, a simpler U-shape model represented by the sum of exponential tails and a constant value function was employed. These simulations were validated using experimental measurements of a reference sample based on silicon dioxide on crystalline silicon (SiO2/c-Si). Additionally, a fitting process of HF-CV curves was proposed using the simple U-shape D it model. A relative error of less than 0.4% was found comparing the average values between the approximated and the experimentally extracted D it’s. The constant function of the approximated D it represents an average of the experimentally extracted D it for values around the midgap energy where the recombination efficiency is highest.

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Capacitance voltage curve simulations for different passivation parameters of dielectric layers on silicon

Sevillano-Bendezú

Dulanto

Conde

et al. 2020

J. Phys.: Conf. Ser.

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Comprehensive Capacitance–Voltage Simulation and Extraction Tool Including Quantum Effects for High- $k$ on SixGe1−x and InxGa1−xAs: Part II—Fits and Extraction From Experimental Data

Anwar

Vandenberghe

Bersuker³

et al. 2017

IEEE Trans. Electron Devices

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Quantum Confinement and Interface States in ZnO Nanocrystalline Thin-Film Transistors

Chapman

Rodriguez-Davila

Vandenberghe

et al. 2018

IEEE Trans. Electron Devices

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Comprehensive Capacitance–Voltage Simulation and Extraction Tool Including Quantum Effects for High-k on Si_{<italic>x</italic>}Ge_{1−<italic>x</italic>} and In_{<italic>x</italic>}Ga_{1−<italic>x</italic>}As: Part I—Model Description and Validation

Cited by 3 publications

References 31 publications

Capacitance voltage curve simulations for different passivation parameters of dielectric layers on silicon

Capacitance voltage curve simulations for different passivation parameters of dielectric layers on silicon

Comprehensive Capacitance–Voltage Simulation and Extraction Tool Including Quantum Effects for High- $k$ on SixGe1−x and InxGa1−xAs: Part II—Fits and Extraction From Experimental Data

Quantum Confinement and Interface States in ZnO Nanocrystalline Thin-Film Transistors

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