Comprehensive Characterization of Extended Defects in Semiconductor Materials by a Scanning Electron Microscope

Hieckmann, Е.; Nacke, Markus; Allardt, M.; Bodrov, Yury; Chekhonin, Paul; Skrotzki, Werner; Weber, J.

doi:10.3791/53872

Cited by 3 publications

(2 citation statements)

References 22 publications

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“…Crystal defects in semiconductor devices, whether present at fabrication or introduced later via radiation damage, can dramatically impair device performance [1][2][3][4][5][6]. Commonly-used methods for characterizing semiconductor defects have spatial resolution that is crude compared to the feature size in modern microelectronic devices.…”

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confidence: 99%

“…Two dimensional mapping is possible with scanning electron microscope electron-beam induced current (SEM EBIC) imaging, which can locate electricallyactive extended (i.e. one-and two-dimensional) defects [3,[9][10][11], monitor the development of conducting filaments in metal-oxide resistive memory [12], measure depletion region widths [13], and map minority carrier diffusion lengths [3,[14][15][16]. However, the spatial resolution of SEM EBIC imaging is limited by the size of its e-h (electronhole) generation volume [17].…”

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confidence: 99%

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Mapping Charge Recombination and the Effect of Point Defect Insertion in Gallium Arsenide Nanowire Heterojunctions

Zutter,

Kim,

Hubbard

et al. 2020

Preprint

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Electronic devices are extremely sensitive to defects in their constituent semiconductors, but locating electronic point defects in bulk semiconductors has previously been impossible. Here we apply scanning transmission electron microscopy (STEM) electron beam-induced current (EBIC) imaging to map electronic defects in a GaAs nanowire Schottky diode. Imaging with a non-damaging 80 or 200 kV STEM acceleration potential reveals a minority-carrier diffusion length that decreases near the surface of the hexagonal nanowire, thereby demonstrating that the device's charge collection efficiency (CCE) is limited by surface defects. Imaging with a 300 keV STEM beam introduces vacancy-interstitial (VI, or Frenkel) defects in the GaAs that increase carrier recombination and reduce the CCE of the diode. We create, locate, and characterize a single insertion event, determining that a defect inserted 7 nm from the Schottky interface broadly reduces the CCE by 10% across the entire nanowire device. Variable-energy STEM EBIC imaging thus allows both benign mapping and pinpoint modification of a device's e-h recombination landscape, enabling controlled experiments that illuminate the impact of both extended (1D and 2D) and point (0D) defects on semiconductor device performance.

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Mapping Charge Recombination and the Effect of Point Defect Insertion in Gallium Arsenide Nanowire Heterojunctions

Zutter,

Kim,

Hubbard

et al. 2020

Preprint

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Investigations of internal stresses in high-voltage devices with deep trenches

Hieckmann

Mühle

Chekhonin

et al. 2020

Journal of Vacuum Science &Amp; Technology B, Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phen

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Deep trenches, as essential elements of silicon chips used in electronic high-power and high-frequency devices, are known as starting points for dislocation generation under the influence of internal mechanical stresses resulting mainly from the difference in the thermal expansion coefficients between silicon and silicon dioxide. Since the electrical insulation of the devices requires a sequence of mechanical, chemical, and high-temperature processes during the preparation of the deep trenches, including the formation of an amorphous SiO2 edge layer, the emergence of the internal stresses is hardly avoidable. The method of cross correlation backscattered electron diffraction in the scanning electron microscope is used here to quantitatively determine the magnitude and local distribution of internal stresses in silicon around the deep trenches after four different process steps. For this purpose, Kikuchi diffraction images are recorded of the wafer cross section areas along lines perpendicular and parallel to the deep trenches. After Fourier transformation, these images are cross correlated with the Fourier transform of the diffraction image from a stressfree reference sample site. The well-established numerical evaluation of cross correlation functions provides the complete distortion tensor for each measuring point of the line scan, from which the stress tensor can be calculated using Hooke's law. It is found that the in-plane normal stress component σ11 perpendicular to the long edges of the deep trench is larger than the other stress components. That means it essentially determines the magnitude of the von-Mises stress, which was determined as a general stress indicator for all measuring points, too. A characteristic feature is the local distribution of the stress component σ11 with maximum tensile stresses of some hundred megapascals at transition between Si and amorphous SiO2 on the long edges of the deep trench, and with even higher maximum compressive stresses immediately below the bottom of the deep trench. At a distance of about 2 μm from the edges of a single deep trench, all stress components decrease to negligibly small values so that steep stress gradients occur. The range and distribution of tensile and compressive stresses are in accordance with finite element simulations; however, the measured stresses are higher than expected for all investigated states so that dislocation formation seems to be possible. The influence of the electron acceleration voltage on the determination of the internal stresses is discussed as well.

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Monte Carlo Simulation of Electron Beam Induced Current in Au/Si Schottky Diodes: effects of metal layer thickness and minority carrier diffusion length

Hafsi,

Khane,

Mansouri

2024

SEES

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The Electron Beam Induced Current (EBIC) technique, when combined with scanning electron microscopy (SEM), offers valuable insights into the electronic properties of semiconductor materials at the nanoscale. This study leverages EBIC and Monte Carlo simulations to investigate the behavior of Schottky diodes, particularly focusing on the influence of gold layer thickness on current gain and backscatter electron (BSE) yield. The simulation results reveal the significant effects of depletion depth and minority carrier diffusion length on the diode’s performance. A key finding is that the EBIC current decreases with increased gold layer thickness, due to a higher BSE fraction. Additionally, at low beam energies, the current is negligible when the interaction volume is confined within the metal layer, while at higher energies, some penetration into the semiconductor occurs, generating a measurable EBIC current. These findings provide a better understanding of the interplay between metal layer thickness and semiconductor performance, which is crucial for optimizing semiconductor devices.

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Comprehensive Characterization of Extended Defects in Semiconductor Materials by a Scanning Electron Microscope

Cited by 3 publications

References 22 publications

Mapping Charge Recombination and the Effect of Point Defect Insertion in Gallium Arsenide Nanowire Heterojunctions

Mapping Charge Recombination and the Effect of Point Defect Insertion in Gallium Arsenide Nanowire Heterojunctions

Investigations of internal stresses in high-voltage devices with deep trenches

Monte Carlo Simulation of Electron Beam Induced Current in Au/Si Schottky Diodes: effects of metal layer thickness and minority carrier diffusion length

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