Concurrency emulation and analysis of parallel applications for multi-processor system-on-chip co-design

Abstract

This paper presents a novel technique for the modeling and the simulation of parallel applications for Multi-Processor Systems-on-Chip (MPSoCs). This technique consists of an application-transparent emulation of OS primitives, including task creation, scheduling, synchronization etc.; this emulation guarantees compatibility with any program compiled against the standard POSIX library, independently of the target OS. This methodology can be used to perform initial HW/SW partitioning and concurrent engineering of a given application, as it allows any software routine to be transparently emulated with SystemC modules. The proposed approach has been verified on a large set of multi-threaded benchmarks, with both POSIX Threads and OpenMP programming styles. Results show that our methodology enables (a) fast simulation of POSIX applications, (b) accurate analysis of multi-threaded applications, and (c) co-design and fast preliminary hardware-software partitioning.

ReSP: A Nonintrusive Transaction-Level Reflective MPSoC Simulation Platform for Design Space Exploration

“…The potential offered by the integration of Python and SystemC is used to query, examine, and modify the internal state of hardware models. Such concepts were presented in [4] and, later, extended to include modeling of parallel applications [5] and Real-Time Operating Systems (RTOS) [6]. This paper unifies the approaches, demonstrating how those mechanisms can be used to create a virtual platform to be employed in most of the tasks of system-level design.…”