2019
DOI: 10.1109/tpel.2018.2847234
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Constant <italic>ΔT<sub>j</sub> </italic> Power Cycling Strategy in DC Mode for Top-Metal and Bond-Wire Contacts Degradation Investigations

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Cited by 20 publications
(13 citation statements)
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“…This in such a way that the increase in V ce is only due to the topside interconnections. Full details on test methodology are given in 10 .…”
Section: General Methodologymentioning
confidence: 99%
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“…This in such a way that the increase in V ce is only due to the topside interconnections. Full details on test methodology are given in 10 .…”
Section: General Methodologymentioning
confidence: 99%
“…Accelerated aging tests applied to insulated-gate-bipolar-transistor power modules (IGBTs) have revealed two main failure mechanisms: the bond-wire degradations (heel-crack or lift-off) and solder delamination (die or DBC attach) [3][4][5] . Nevertheless, such aging tests are performed under single and fixed load conditions 3,4,6,7 and lead to empirical lifetime models [8][9][10] . Concerning the stress counting, the most popular method is the rainflow method that is widely used for on-line estimation of the remaining useful lifetime 11,12 .…”
mentioning
confidence: 99%
“…Four control strategies can be adopted while running DC power cycling test [110,111]. These strategies are constantturn-on-time, constant peak-to-peak case temperature, constant power loss, and constant peak-to-peak junction temperature.…”
Section: ) DC Power Cylcling Control Strategiesmentioning
confidence: 99%
“…Generally, the wear-out failure of power electronics devices is evaluated by Physics-of-Failure (POF) analysis after a power cycling test (PCT) or thermal shock test (TST) [9][10] [11]. However, the POF analysis is much complex and expensive for application in field reliability and it cannot predict the lifetime of power electronics.…”
Section: Introductionmentioning
confidence: 99%