Copper-Plating Metallization With Alternative Seed Layers for c-Si Solar Cells Embedding Carrier-Selective Passivating Contacts

Limodio, Gianluca; Groot, Yvar De; Kuler, Gerwin Van; Mazzarella, Luana; Zhao, Yifeng; Procel, Paul; Yang, Guangtao; Isabella, Olindo; Zeman, Miro

doi:10.1109/jphotov.2019.2957671

Cited by 21 publications

(18 citation statements)

References 44 publications

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“…27 Additionally, the front grid of some solar cells is Cu-plated by means of a mask-less process (plating current density of 576 mA/cm 2 for 1500 s) using evaporated titanium as seed layer. 46 For solar cells with decoupled front/rear poly-Si thicknesses, the fabrication process consists in repeating twice the SiO 2 /poly-Si deposition using a SiN x layer to protect one of the wafer's surface and a poly-Si etching in between. Poly-Si layer is etched in a mixture of HF/HNO 3 and H 2 O.…”

Section: Methodsmentioning

confidence: 99%

“…At rear side, a stack of Ag/Cr/Al (200 nm/30 nm/2 μm) is evaporated through a hard mask to define the cell area of 2.8 cm × 2.8 cm (7.84 cm 2 ), while, at the front side, a 2‐μm‐thick e‐beam evaporated Al metal grid (5% metal coverage) is structured via photolithography, etching of SiN x ARC, evaporation, and lift‐off . Additionally, the front grid of some solar cells is Cu‐plated by means of a mask‐less process (plating current density of 576 mA/cm 2 for 1500 s) using evaporated titanium as seed layer . For solar cells with decoupled front/rear poly‐Si thicknesses, the fabrication process consists in repeating twice the SiO 2 /poly‐Si deposition using a SiN x layer to protect one of the wafer's surface and a poly‐Si etching in between.…”

Section: Methodsmentioning

confidence: 99%

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Implantation‐based passivating contacts for crystalline silicon front/rear contacted solar cells

Limodio

Yang

Groot

et al. 2020

Progress in Photovoltaics

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In this work, we develop SiOx/poly‐Si carrier‐selective contacts grown by low‐pressure chemical vapor deposition and boron or phosphorus doped by ion implantation. We investigate their passivation properties on symmetric structures while varying the thickness of poly‐Si in a wide range (20‐250 nm). Dose and energy of implantation as well as temperature and time of annealing were optimized, achieving implied open‐circuit voltage well above 700 mV for electron‐selective contacts regardless the poly‐Si layer thickness. In case of hole‐selective contacts, the passivation quality decreases by thinning the poly‐Si layer. For both poly‐Si doping types, forming gas annealing helps to augment the passivation quality. The optimized doped poly‐Si layers are then implemented in c‐Si solar cells featuring SiO2/poly‐Si contacts with different polarities on both front and rear sides in a lean manufacturing process free from transparent conductive oxide (TCO). At cell level, open‐circuit voltage degrades when thinner p‐type poly‐Si layer is employed, while a consistent gain in short circuit current is measured when front poly‐Si thickness is thinned down from 250 to 35 nm (up to +4 mA/cm2). We circumvent this limitation by decoupling front and rear layer thickness obtaining, on one hand, reasonably high current (JSC‐EQE = 38.2 mA/cm2) and, on the other hand, relatively high VOC of approximately 690 mV. The best TCO‐free device using Ti‐seeded Cu‐plated front contact exhibits a fill factor of 75.2% and conversion efficiency of 19.6%.

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Section: Methodsmentioning

confidence: 99%

Section: Methodsmentioning

confidence: 99%

Implantation‐based passivating contacts for crystalline silicon front/rear contacted solar cells

Limodio

Yang

Groot

et al. 2020

Progress in Photovoltaics

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“…Additionally, the CE F of MF plating is much higher than the current efficiency of 30% in our previously reported MF Cu‐plating process. [ 42 ] The CE F improvement could be mainly ascribed to the fresh and optimal commercial electrolyte solution use, as well as the modification in circuit connections.…”

Section: Resultsmentioning

confidence: 99%

“…is equal to AR , and is generally 0.2–1. [ 9,18,25,42,45–47 ] For the hybrid fingers as shown in Figure 3b,c, the w top values are calculated to be 34.3 and 15.4 μm, respectively. The corresponding measured h finger values are 41 and 33 μm, and the AR eff.…”

Section: Resultsmentioning

confidence: 99%

“…More details about the process sequence could be found elsewhere. [ 42 ] A dual‐functional sample holder, which could contact the seed layer on each side of the wafer individually with 2 separated potentiostat tools, was designed for satisfying both MF and BF electroplating purposes. To ensure a homogenous current distribution in the electrochemical process, a surrounding electric contact was utilized by sandwiching the wafer between two metal rings, whose outer circles matched the shape of the wafer.…”

Section: Methodsmentioning

confidence: 99%

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Controllable Simultaneous Bifacial Cu‐Plating for High‐Efficiency Crystalline Silicon Solar Cells

et al. 2022

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Bifacial (BF) copper‐plated crystalline silicon solar cell is an attractive topic to concurrently reduce silver consumption and maintain good device performance. However, it is still challenging to realize a high aspect ratio (AR) of the metal fingers. Herein, a new type of hybrid‐shaped Cu finger is electromagnetically fabricated in a BF plating process. Cyclic voltammetry is employed to disclose the electrochemical behaviors of cupric ions in monofacial and simultaneous BF Cu‐plating processes, such that the controllability of the plating process could be assessed. The optimal hybrid Cu finger is composed of a rectangular bottom part and a round top part, such that an utmost effective AR value of 1.73 is reached. In BF Cu‐plating, two sub‐three‐electrode electrochemical cells are employed to realize equal metal finger heights on both sides of the wafer. Compared to our low thermal‐budget screen‐printing metallization, the Cu‐plated silicon heterojunction devices show both optical and electrical advantages (based on lab‐scale tests). The champion BF Cu‐plated device shows a front‐side efficiency of 22.1% and a bifaciality factor of 0.99.

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Toward Efficiency Limits of Crystalline Silicon Solar Cells: Recent Progress in High‐Efficiency Silicon Heterojunction Solar Cells

Sun

Chen

et al. 2022

Advanced Energy Materials

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Photovoltaic (PV) technology is ready to become one of the main energy sources of, and contributers to, carbon neutrality by the mid‐21st century. In 2020, a total of 135 GW of PV modules were produced. Crystalline silicon solar cells dominate the world's PV market due to high power conversion efficiency, high stability, and low cost. Silicon heterojunction (SHJ) solar cells are one of the promising technologies for next‐generation crystalline silicon solar cells. Compared to the commercialized homojunction silicon solar cells, SHJ solar cells have higher power conversion efficiency, lower temperature coefficient, and lower manufacturing temperatures. Recently, several new record efficiencies have been achieved. To meet the continued demand for high‐efficiency solar cells, expectations for large‐scale mass production of SHJ solar cells are rising. To approach the efficiency limit and industrialization of SHJ solar cells, serious attempts have been made, yielding higher short‐circuit current, open‐circuit voltage, and fill factor. In this article, these recent advancements are reviewed, which reveals the future roadmap for approaching the efficiency limit.

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Copper-Plating Metallization With Alternative Seed Layers for c-Si Solar Cells Embedding Carrier-Selective Passivating Contacts

Cited by 21 publications

References 44 publications

Implantation‐based passivating contacts for crystalline silicon front/rear contacted solar cells

Implantation‐based passivating contacts for crystalline silicon front/rear contacted solar cells

Controllable Simultaneous Bifacial Cu‐Plating for High‐Efficiency Crystalline Silicon Solar Cells

Toward Efficiency Limits of Crystalline Silicon Solar Cells: Recent Progress in High‐Efficiency Silicon Heterojunction Solar Cells

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