CP element based design for 14nm node EBDW high volume manufacturing

Abstract

We had previously established CP (character projection) based EBDW technology for 65nm and 45nm device production [1] [2]. And recently we have confirmed the resolution of 14nm L&S patterns which meets 14nm and beyond node logic requirement with CP exposure [3]. From these production achievement and resolution potential, with multi-beam EBDW and CP function, MCC [4] could be one of the most promising technologies for future high volume manufacturing if exposure throughput was drastically enhanced. We have set target throughput as 100 WPH to meet HVM (high volume manufacturing) requirement. Our designed parameters to attain 100 WPH for 14nm result in 150 beams, 10cluster, 100 Giga shots/wafer, 250A/cm^2 and 75uC/cm^2.In addition to multi-beam, drastic exposure shot reduction is indispensable to attain 100 WPH for 14nm node. We have aggressively targeted 100 Giga shot count which is equivalent to covering 300mm wafer with 0.8um x 0.8um square fairly large tile. All device circuit blocks should be structured with only CP defined parts and we should trace back to upstream design flow to RTL. We call this methodology "CP element based design". In near future, Litho-Friendly restricted design would be commonly used [5] [6]. Our CP defined tile based regular layout would be highly compatible with these ultra-regular design approaches. The primal design factors are Logic cell, Memory macro and random interconnect. We have established concepts to accomplish high volume production with CP-based EBDW at 14nm technology node.

E-Beam Lithography Character and Stencil Co-Optimization

“…The shot savings by CASCO are again less than 1% away from the upper bound values. Comparing the results in Table II to the results in Table I, we can observe that the solution quality of [8] degraded with 2 In other words, S is set to the minimum original blank space on both sides over all characters. 3 Since we have shown in the proof of Lemma 7 that the total effective width of all characters in an optimal solution cannot exceed R(W +E −S −w min ).…”

“…For each benchmark, we set the effective printing region to be the smallest value possible (i.e., the safety margin to be the biggest value possible) such that all original character patterns are still within the effective printing region. 2 In Table I, we report the values of E and S for each benchmark as well as the results of upper bound 3 , [8], [9], and CASCO. Columns 4, 6, 9, and 12 report the number of shots that can be saved if CP is also used.…”

“…CASCO performs much better than the published state of the art [8] and [9] mainly because it exploits the flexibility in the location of a character pattern within its effective printing region. Finally, we note that CASCO can be applied to the stencil design of a multi-beam system [1], [2]. In a multi-beam system, multiple beam columns furnished with their own stencils write different regions of a wafer in parallel.…”

“…Since character projection can significantly reduce the shot count, which is directly proportional to the writing time, the throughput of e-beam writing system can be significantly improved. Besides, the throughput of shooting a wafer can be further increased by employing a multi-beam system [1], [2]. In conventional stencil design, characters are placed in a regular 2-D array on the stencil as shown in Fig.…”

Effects on electron scattering and resist characteristics using assisting underlayers for e-beam direct write lithography

“…Because of these limitations, e-beam direct writing (EBDW) on wafers is mainly used for R&D and rapid prototyping applications involving low wafer volumes. To improve the throughput and make this technology more attractive for CMOS manufacturing, several companies are working on different concepts for the parallelization of multiple beams [1,2,3,4,5].…”