Current increment of tunnel field-effect transistor using InGaAs nanowire/Si heterojunction by scaling of channel length

Tomioka, Katsuhiro; Fukui, Takashi

doi:10.1063/1.4865921

Cited by 47 publications

(34 citation statements)

References 24 publications

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“…[1][2][3] By exploiting the quantum mechanical (QM) phenomenon of band-to-band tunneling (BTBT), the TFET has shown to be capable of reaching sub-60 mV/dec subthreshold swing (SS), a crucial feat in enabling supply voltage scaling to and below 0.5 V. As the on-current (I on ) of group-IV based TFETs is typically too low, implementation in III-V materials is under active research. [4][5][6][7][8][9] There is a fundamental imbalance, however, between n-type and p-type TFETs made from direct bandgap III-V materials, with p-TFETs typically performing worse than their n-type counterparts. 3,10 This is true for the basic p-i-n/n-i-p configurations, as well as for the p-n-i-n/n-p-i-p variants, in which a source pocket is included to improve the I on and SS.…”

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confidence: 99%

Improved source design for p-type tunnel field-effect transistors: Towards truly complementary logic

Verreck

Verhulst

Sorée

et al. 2014

Applied Physics Letters

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Articles you may be interested inErratum: "Improved source design for p-type tunnel field-effect transistors: Towards truly complementary logic" [Appl. Phys. Lett. 105, 243506 (2014)] Appl. Phys. Lett. 106, 049902 (2015); 10.1063/1.4906935 Can p-channel tunnel field-effect transistors perform as good as n-channel? Appl. Phys. Lett. 105, 043103 (2014); 10.1063/1.4891348Structural, morphological, and defect properties of metamorphic In0.7Ga0.3As/GaAs0.35Sb0.65 p-type tunnel field effect transistor structure grown by molecular beam epitaxy Analytic potential and charge model for III-V surrounding gate metal-oxide-semiconductor field-effect transistors

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mentioning

confidence: 99%

Improved source design for p-type tunnel field-effect transistors: Towards truly complementary logic

Verreck

Verhulst

Sorée

et al. 2014

Applied Physics Letters

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“…We investigated the effect of channel-length (L ch ) scaling in InGaAs NW/Si heterojunction-type vertical TFETs (29). Figure 5 shows the L ch dependence of the transfer curve at a V DS of 0.10 V. L G was 150 nm.…”

Section: Channel-length Scalingmentioning

confidence: 99%

(Invited) Recent Progress in Vertical Si/III-V Tunnel FETs: From Fundamentals to Current-Boosting Technology

Tomioka¹,

Motohisa²,

Fukui³

2016

ECS Trans.

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Tunnel field-effect transistors (TFETs) with a steep subthresholdslope (SS) are promising low-power switches for future largescale integrated circuits (LSIs) with low power consumption and high performance. Recently, we demonstrated vertical TFETs with III-V/Si heterojunctions. This new sort of tunnel junction achieves a steep SS because of its unique figure-of-merit. Here, we report on recent progress on vertical TFETs using Si/III-V heterojunctions and means for boosting on-state current.

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“…The carrier concentration due to only a single Zn atom, however, is estimated to be about 2 × 10 17 cm -3 in such a small NWchannel. Then we implemented a pulse-doping technique [22,25] to obtain the compensation effect. In the case of the Zn pulse-doped InGaAs NW-channel, the threshold voltage (V T ) for the SGT shifted to 0.389 V and the carrier concentration was estimated to be 7.8 × 10 15 cm -3 .…”

Section: Doping Effect In Channel Regionmentioning

confidence: 99%

“…The N D was decreased by using a Zn-pulse doping technique. Figure 8 shows the transfer curves of a TFET using the InGaAs NW/Si heterojunction with the Zn pulse-doped InGaAs NW-channel [22,25]. The NW was 30 nm in diameter.…”

Section: Doping Effect In Channel Regionmentioning

confidence: 99%

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Advances in steep-slope tunnel FETs

Tomioka

Motohisa

Fukui

2016

2016 46th European Solid-State Device Research Conference (ESSDERC)

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Abstract-Tunnel FETs (TFETs) with steep subthreshold slope have been attracting much attention as building blocks for future low-power integrated circuits and CMOS technology devices. Here we report on recent advances in vertical TFETs using III-V/Si heterojunctions. These heterojunctions, which are formed by direct integration of III-V nanowires (NWs) on Si, are promising tunnel junction for achieving steep subthreshold slope (SS). The III-V/Si heterojunction inherently forms abrupt junctions regardless of precise doping technique because the band discontinuity is determined by only the offset of III-V and Si, and depletion region can be controlled by the III-V MOS structure. Thus, good gate-electrostatic control with a large internal electrical field for modulation of tunnel transport can be achieved. Here we repot on recent advances in the vertical TFETs using the III-V NW/Si heterojunction with surroundinggate architecture and demonstrate steep-SS behavior and very low parasitic leakage current.

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Current increment of tunnel field-effect transistor using InGaAs nanowire/Si heterojunction by scaling of channel length

Cited by 47 publications

References 24 publications

Improved source design for p-type tunnel field-effect transistors: Towards truly complementary logic

Improved source design for p-type tunnel field-effect transistors: Towards truly complementary logic

(Invited) Recent Progress in Vertical Si/III-V Tunnel FETs: From Fundamentals to Current-Boosting Technology

Advances in steep-slope tunnel FETs

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