International Test Conference 1999. Proceedings (IEEE Cat. No.99CH37034)
DOI: 10.1109/test.1999.805803
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Current ratios: a self-scaling technique for production I/sub DDQ/ testing

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Cited by 134 publications
(17 citation statements)
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“…Maxwell et al observed that in spite of an order of magnitude difference in I DDQ values, dice had similar signatures, as shown in Fig. 1 [7]. It was proposed that ratios of maximum I DDQ to minimum I DDQ for fault-free chips would have small variation and can be used as a pass/fail criterion.…”
Section: Current Ratios Conceptmentioning
confidence: 96%
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“…Maxwell et al observed that in spite of an order of magnitude difference in I DDQ values, dice had similar signatures, as shown in Fig. 1 [7]. It was proposed that ratios of maximum I DDQ to minimum I DDQ for fault-free chips would have small variation and can be used as a pass/fail criterion.…”
Section: Current Ratios Conceptmentioning
confidence: 96%
“…This indicates that the SEMA-TECH I DDQ test limit of 5 lA resulted in considerable yield loss. [7].…”
Section: Current Ratios Conceptmentioning
confidence: 99%
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“…The current Ratio of a chip is the ratio of the maximum I DDQ to the minimum I DDQ [6]. It is based on the observation that the intra-die (within-die) variation in I DDQ for fault-free chips is deterministic and relatively constant.…”
Section: Current Ratio and Process Variabilitymentioning
confidence: 99%
“…Several solutions have been proposed in the literature to extend I DDQ test to deep sub-micron (DSM) technologies by reducing variance in the data using graphical means [5] or statistical post-processing of data [6] [7]. Most of these methods rely on the observation that variations in fault-free I DDQ are regular and deterministic and those caused by a defect are random in nature.…”
Section: Introductionmentioning
confidence: 99%