Customisable Core-Based Architectures for Real-Time Motion Estimation on FPGAs

Abstract

Abstract. This paper proposes new core-based architectures for motion estimation that are customisable for different coding parameters and hardware resources. These new cores are derived from an efficient and fully parameterisable 2-D single array systolic structure for full-search block-matching motion estimation and inherit its configurability properties in what concerns the macroblock dimension, the search area and parallelism level. The proposed architectures require significantly fewer hardware resources, by reducing the spatial and pixel resolutions rather than restricting the set of considered candidate motion vectors. Low-cost and low-power regular architectures suitable for field programmable logic implementation are obtained without compromising the quality of the coded video sequences. Experimental results show that despite the significant complexity level presented by motion estimation processors, it is still possible to implement fast and low-cost versions of the original core-based architecture using general purpose FPGA devices.

Fast Full-Search Block Matching Algorithm Motion Estimation Alternatives in FPGA

“…Roma et al [7] Presents an innovative processing scheme based on a cylindrical structure and on the zig-zag procesing sequence proposed in [1]. This cylinder is based on active and passive PEs.…”

Real-time compression architecture for efficient coding in autostereoscopic displays

“…Up to now, hardware optimizations for compression schemes based on motion estimation either demonstrate impractical high bandwidth demands [32,33] or are insufficient for real-time 3D applications [10]. Currently proposed simplifications on MPEG-2 components are constrained to specific 2D applications [11,19,24,35].…”

Hardware implementation of a disparity estimation scheme for real-time compression in 3D imaging applications

“…• FPGA implementations of parts or simplified MPEG components [9,12,13]. • Novel architectures for parts of the MPEG compression scheme, such as the Sum of Absolute Differences (SAD), the DCT and inverse DCT transforms and the Motion Estimation component [14][15][16].…”