2018
DOI: 10.1021/acsami.7b16307
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Cyclical Annealing Technique To Enhance Reliability of Amorphous Metal Oxide Thin Film Transistors

Abstract: This study introduces a cyclical annealing technique that enhances the reliability of amorphous indium-gallium-zinc-oxide (a-IGZO) via-type structure thin film transistors (TFTs). By utilizing this treatment, negative gate-bias illumination stress (NBIS)-induced instabilities can be effectively alleviated. The cyclical annealing provides several cooling steps, which are exothermic processes that can form stronger ionic bonds. An additional advantage is that the total annealing time is much shorter than when us… Show more

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Cited by 20 publications
(6 citation statements)
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“…This experiment was the same as those used in previous works . In our experiment, we used a bottom gate a-IGZO TFTs prepared with an inverted staggered etch stop layer (ESL) structure fabricated on the glass substrate.…”
Section: Experimental Devicesmentioning
confidence: 99%
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“…This experiment was the same as those used in previous works . In our experiment, we used a bottom gate a-IGZO TFTs prepared with an inverted staggered etch stop layer (ESL) structure fabricated on the glass substrate.…”
Section: Experimental Devicesmentioning
confidence: 99%
“…This experiment was the same as those used in previous works. 22 In our experiment, we used a bottom gate a-IGZO TFTs prepared with an inverted staggered etch stop layer (ESL) structure fabricated on the glass substrate. First, a Ti/Al/Ti (50/200/50 nm) film was deposited by sputtering with Ar ion and wet-etched to form the bottom gate electrode.…”
Section: ■ Experimental Devicesmentioning
confidence: 99%
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“…99–101 Especially in the study by Chen et al , a cyclical low-temperature annealing process was employed to alleviate the NBIS-induced instability of the a-IGZO TFT. 102 The cyclical annealing process in O 2 ambient condition at 220 °C is composed of an alternating heating process progressed at 220 °C for 3 min followed by 1 min cooling period (Fig. 11(a)).…”
Section: Stress Induced By Illuminationmentioning
confidence: 96%
“…Substantial improvements in the electrical performance and bias stress stability of oxide TFTs have been achieved based on the identification of the defect degradation mechanisms, including ambient interactions, charge trapping, and creation of deep defect states. The dynamic interactions between the exposed back channel and atmosphere can be prevented by choosing an appropriate passivation layer, while the trapped charge carriers can be reduced by annealing. However, the intrinsic subgap states related to oxygen vacancies (V O ), i.e., shallow donor states near the conduction band minimum (CBM) and deep donor states above the valence band maximum (VBM), are hardly to be eliminated by simple annealing or passivation, which capture electrons/photoexcited holes and incur threshold voltage ( V th ) shifts. , Preferably, extrinsic doping and the bilayer-channel structure are two of the most efficient channel engineering techniques in resolving the bias stress instability and electrical performance degradation issues. The incorporation of defect binders such as Hf or N can efficiently suppress the formation of V O defects and enhance the bias stress stability. However, such dopants also serve as electron suppressors, which in turn degrade the transporting properties.…”
Section: Introductionmentioning
confidence: 99%