Dark field double dipole lithography (DDL) for back-end-of-line processes

Burkhardt, Martin; Burns, Sean; Dunn, Derren; Brunner, Timothy A.; Hsu, Stephen; Park, Jungchul

doi:10.1117/12.713277

Cited by 10 publications

(7 citation statements)

References 3 publications

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“…True line ends (those that are a line end in the design, before decomposition begins) received an additional treatment. At the ends of vertical lines, the contrast and mask error enhancement factor (MEEF) suffered because these horizontal edges were defined only on the E1 mask 4 . To address this, we added a small rectangle at the line end on the E2 mask.…”

Section: Decomposition Algorithmmentioning

confidence: 99%

Double dipole RET investigation for 32 nm metal layers

Babcock

Zou

Dunn³

et al. 2008

Photomask Technology 2008

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For 32 nm test chips, aggressive resolution enhancement technology (RET) was required for 1x metal layers to enable printing minimum pitches before availability of the final 32 nm exposure tool. Using a currently installed immersion scanner with 1.2 numerical aperture (NA) for early 32 nm test chips, one of the RET strategies capable of resolving the minimum pitch with acceptable process latitude was dipole illumination. To avoid restricting the use of minimum pitch to a single orientation, we developed a double-expose/single-develop process using horizontal and vertical dipole illumination. To enable this RET, we developed algorithms to decompose general layouts, including random logic, interconnect test patterns, and SRAM designs, into two mask layers: a first exposure (E1) of predominantly vertical features, to be patterned with horizontal dipole illumination; and, a second exposure (E2) of predominantly horizontal features, to be patterned with vertical dipole illumination. We wrote this algorithm into our OPC program, which then applies sub-resolution assist features (SRAFs) separately to the E1 and E2 masks, coordinating the two to avoid problems with overlapping exposures. This was followed by two-mask OPC, using E1 and E2 as mask layers and the original layout (single layer) as the target layer. In this paper, we describe some of the issues with decomposing layout by orientation, issues that arise in SRAF application and OPC, and some approaches we examined to address these issues.

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Section: Decomposition Algorithmmentioning

confidence: 99%

Double dipole RET investigation for 32 nm metal layers

Babcock

Zou

Dunn³

et al. 2008

Photomask Technology 2008

Self Cite

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“…This method provides better contrast since each source is optimal for printing its given layout. Further, there are two flavors to double exposure -clear-field and dark-field imaging 12,13 . The former provides better contrast, but since a clear background during the first exposure changes the resist, it is necessary to shield the features for the second exposure in the first mask.…”

Section: Introductionmentioning

confidence: 99%

“…Under such conditions, one viable technique for continued scaling using the current 193nm wavelength immersion lithography is the use of multiple exposure or patterning steps. Double exposure 11,12,13 and double patterning lithography 9,10 (DPL) are two such proposed methods. DPL itself has several flavors including sidewall image transfer (SIT) and litho-etch-litho-etch (LELE).…”

Section: Introductionmentioning

confidence: 99%

“…One popular double exposure lithography method in use is double dipole lithography (DDL) 8,12,13 . Figure 1 shows a cross-quadrupole source that is popularly used to print layouts due to the off-axis illumination (OAI) provided by such sources for both horizontal and vertical features.…”

Section: Introductionmentioning

confidence: 99%

“…Double exposure lithography 11,12,13 is the technique of printing a given layout using two exposures, both of which use separately optimized sources. One popular double exposure lithography method in use is double dipole lithography (DDL) 8,12,13 .…”

Section: Introductionmentioning

confidence: 99%

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Simultaneous OPC and decomposition for double exposure lithography

2011

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Double exposure techniques are an economically viable method for extending the life of the current 193nm wavelength immersion lithography techniques into future generations of semiconductor scaling. One popular example of double exposure is the use of double dipole illumination, where the X and Y dipoles are separately optimized for vertical and horizontal features respectively. The primary challenge in such double exposure techniques lies in the process of target layout decomposition into patterns that can be optimally printed using their respective source. Current approaches for decomposition are rule-based. They suffer from the drawbacks of scalability, rule count explosion and inability to guarantee sufficient yield in the presence of process variation. Further, rules are characterized specific to sources and are relatively easy to develop for dipoles, but far more difficult to develop for more complex sources such as used in source mask optimization (SMO). Decomposed target layouts have to further undergo optical proximity correction (OPC) in order to be converted to a mask for use in manufacturing. In this paper, we propose a novel approach which integrates the processes of decomposition and optical proximity correction. We preclude the intermediate target decomposition stage. Instead, we directly optimize the masks for both exposures simultaneously in order to obtain a wafer image that both closely matches the target layout and is also robust to process variation. For this purpose, we define a lithographic cost function that is a weighted sum of intensity error and intensity slope. We develop methods to analytically predict the change in this cost function due to movement of fragments on each mask. We then utilize a gradient-descent algorithm for fragment movement to minimize the cost function. Since our methodology is based on the knowledge of the SOCS decomposition kernels, it is not restricted to dipoles alone, but can be utilized for any complex sources for which such kernels are known. Our experiments on 1x metal (M1) show significant improvement in layout process window compared to traditional rule-based decomposition methods.

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Double-patterning requirements for optical lithography and prospects for optical extension without double patterning

Wakamoto

2009

J. Micro/Nanolith. MEMS MOEMS

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Double patterning ͑DP͒ has now become a fixture on the development roadmaps of many device manufacturers for half pitches of 32 nm and beyond. Depending on the device feature, different types of DP and double exposure ͑DE͒ are being considered. This paper focuses on the requirements of the most complex forms of DP, pitch-splitting ͑where line density is doubled through two exposures͒ and spacer processes ͑where a deposition process is used to achieve the final pattern͒. Budgets for critical dimension uniformity and overlay are presented along with tool and process requirements to achieve these budgets. Experimental results showing 45-nm lines and spaces using dry ArF lithography with a k 1 factor of 0.20 are presented to highlight some of the challenges. Finally, alternatives to DP are presented.

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Dark field double dipole lithography (DDL) for back-end-of-line processes

Cited by 10 publications

References 3 publications

Double dipole RET investigation for 32 nm metal layers

Double dipole RET investigation for 32 nm metal layers

Simultaneous OPC and decomposition for double exposure lithography

Double-patterning requirements for optical lithography and prospects for optical extension without double patterning

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