Dataflow Computing in Extreme Performance Conditions

Oriato, Diego; Girdlestone, Stephen; Mencer, Oskar

doi:10.1016/bs.adcom.2014.11.002

Cited by 5 publications

(2 citation statements)

References 11 publications

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“…Instead of thinking how we would solve a single piece of the problem, we should rather think of how a group of specialized workers would solve the same problem, and then focus on the production system as a whole, imagining the worker in a factory line. For state of the art, see [15][16]. …”

Section: Selected Maxeler Application Gallery Examplesmentioning

confidence: 99%

An AppGallery for dataflow computing

et al. 2016

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Section: Selected Maxeler Application Gallery Examplesmentioning

confidence: 99%

An AppGallery for dataflow computing

et al. 2016

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“…4) Direct network access for the FPGA fabric control and data plane (allowing disaggregation [13], zero-copy data transfer and avoiding host interaction [14]). 5) Point-to-point data streaming over the commodity Ethernet network (for multi-FPGA dataflow applications [15], [16]). 6) Remote Memory Access (RMA) onesided communication/distributed shared memory (for pointer chasing applications, e.g.…”

Section: Introductionmentioning

confidence: 99%

DiAD – Distributed Acceleration for Datacenter FPGAs

Lant,

Skordalakis,

Paraskevas

et al. 2023

2023 33rd International Conference on Field-Programmable Logic and Applications (FPL)

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The growing demands placed upon modern compute and network resources are far exceeding the capabilities of traditional computer architectures. It is now customary for accelerators to perform the bulk of compute, and this compute is being pushed ever closer to the network. FPGA vendors have brought powerful datacenter cards to the market, combining reprogrammable FPGA fabrics with high bandwidth networking capability. However, the supporting infrastructure has yet to reach maturity, so modern and diverse workloads are not yet able to fully leverage these architectural advances.In this paper we present DiAD; a novel framework providing FPGA firmware and driver support for fully unified, distributed compute and network acceleration across a commodity Ethernet network. We present a far richer feature set and greater flexibility than other existing solutions. We show comparable networking performance from the host when compared to Xilinx's OpenNIC solution. As well as allowing for host networking through the FPGA fabric, we demonstrate reliable data transfer directly between FPGA fabrics without host intervention, and show native memory transactions sent over the network supporting pointer-chasing workloads. We achieve line rate for dataflow type communication and approach line rate for larger native memory transfers (87G). This is the author's version of the work. It is made available only for personal use. Not for redistribution. The definitive Version of Record is to be published in the proceedings of the 33rd International Conference on Field-Programmable Logic and Applciations (FPL'23), Sept 4-8, 2023.1 DiAD focuses on AMD/Xilinx devices as the use of the proprietary QDMA IP is central to the design.

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Data Flow Computing in Geoscience Applications

Gan

Mencer

et al. 2017

Advances in Computers

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Dataflow Computing in Extreme Performance Conditions

Cited by 5 publications

References 11 publications

An AppGallery for dataflow computing

An AppGallery for dataflow computing

DiAD – Distributed Acceleration for Datacenter FPGAs

Data Flow Computing in Geoscience Applications

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