DC Versus Pulse-Type Negative Bias Stress Effects on the Instability of Amorphous InGaZnO Transistors Under Light Illumination

Chang, Youn‐Gyoung; Moon, Taewoong; Kim, Dae-Hwan; Lee, Hee Sung; Kim, Jae-Hoon; Park, Kwon‐Shik; Kim, Chang‐Dong; Im, Seongil

doi:10.1109/led.2011.2167736

Cited by 20 publications

(20 citation statements)

References 11 publications

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“…The threshold voltage shifting has been explained by the various proposed concept viz., logarithmic law, photodesorption of oxygen/H 2 O, interface modification, grainboundary trap states, charge trapping and de-trapping stretched-exponential models. [21][22][23][24][25] In this regard, the polycrystalline ZnO exhibits clear grain boundaries with higher roughness value rather than the IGZO and ZnO co-sputtered IGZO thin films-leading thereby to chemisorbed more oxygen as the back channel is exposed to the atmosphere. 26 The adsorbed oxygen species contribute to decrease the carrier density as O 2 + e → ܱ ଶ ሺௗ௦ሻ ି .…”

Section: Reliability Test Of Tftsmentioning

confidence: 99%

Electrical characteristics of InGaZnO thin film transistor prepared by co-sputtering dual InGaZnO and ZnO targets

et al. 2015

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A co-sputtering of dual InGaZnO and ZnO targets, abbreviated by ZnO co-sputtered IGZO, is used to fabricate a high performance indium gallium zinc oxide (IGZO) thin film transistor in this work. The ZnO co-sputtered IGZO thin film exhibits smooth (Rrms ~ 0.29 nm), featureless, and amorphous structure with high carrier density (n ~ 4.29 × 10 17 cm -3 ). The performance and stability of ZnO co-sputtered IGZO TFT has been investigated and compared with the counterparts fabricated by a single ZnO and a-IGZO target respectively. Highest linear field effect mobility of 16.1 cm 2 /Vs with an Ion/Ioff ratio of 1.04 × 10 7 , saturation drain current of 3.8 μA at 5V, and the lowest threshold voltage of 2.0 V with sub-threshold swing of 0.21V/dec have been obtained for the ZnO co-sputtered IGZO TFT. Furthermore, the ZnO co-sputtered IGZO TFT exhibited only a threshold voltage shift (∆Vth) of 2.75 V under negative biased illuminated stress conditions for 2500s, whereas the IGZO and ZnO based TFTs suffered from a huge threshold voltage shift (∆Vth > 6 V) under the same conditions. The obtained performance and stability of TFTs with ZnO co-sputtered IGZO film is very promising for low voltage displays applications.

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Section: Reliability Test Of Tftsmentioning

confidence: 99%

Electrical characteristics of InGaZnO thin film transistor prepared by co-sputtering dual InGaZnO and ZnO targets

et al. 2015

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“…This is due to the fact that the electrons are excited from the trapped states existing near the valence band ( E V ). In addition, the a-IGZO TFTs inevitably suffer electrical and optical stresses during practical operation conditions, especially for the negative bias and illumination stress (NBIS) tests [11–16], which leads to device instability and restricts the development of oxide TFTs for commercial products.…”

Section: Introductionmentioning

confidence: 99%

Exploring the photoleakage current and photoinduced negative bias instability in amorphous InGaZnO thin-film transistors with various active layer thicknesses

Wang¹,

Furuta²

2018

Beilstein J. Nanotechnol.

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The photoleakage current and the negative bias and illumination stress (NBIS)-induced instability in amorphous InGaZnO thin-film transistors (a-IGZO TFTs) with various active layer thicknesses (T IGZO) were investigated. The photoleakage current was found to gradually increase in a-IGZO TFTs irrespective of the T IGZO when the photon energy of visible light irradiation exceeded ≈2.7 eV. Furthermore, the influence of the T IGZO on NBIS-induced instability in a-IGZO TFTs was explored by the combination of current–voltage measurements in double-sweeping V GS mode and capacitance–voltage measurements. The NBIS-induced hysteresis was quantitatively analyzed using a positive gate pulse mode. When the T IGZO was close to the Debye length, the trapped electrons at the etch-stopper/IGZO interface, the trapped holes at the IGZO/gate insulator interface, and the generation of donor-like states in an a-IGZO layer were especially prominent during NBIS.

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“…Oxide thin‐film transistors (TFTs) such as amorphous indium‐gallium‐zinc oxide (a‐IGZO) TFTs have gained much attention for active matrix display (AMD) applications because they provide better uniformity and lower production cost compared with low temperature polysilicon TFTs and higher mobility compared with conventional amorphous‐Si TFTs . Even though high operational performance has been achieved in oxide TFTs, they still suffer from bias‐induced threshold voltage (V th ) instability . For successful failure analysis of oxide TFT‐based circuits, TFT models that can detect dynamic V th shift (ΔV th ) are therefore warranted.…”

Section: Introductionmentioning

confidence: 99%

“…1,2 Even though high operational performance has been achieved in oxide TFTs, they still suffer from bias-induced threshold voltage (V th ) instability. [3][4][5][6][7][8][9][10] For successful failure analysis of oxide TFT-based circuits, TFT models that can detect dynamic V th shift (ΔV th ) are therefore warranted. However, conventional TFT models for spice circuit simulators cannot detect dynamic ΔV th .…”

Section: Introductionmentioning

confidence: 99%

Spice model for detection of dynamic threshold voltage shift during failure analysis of oxide TFT‐based AMD gate drivers

Lee¹,

Mativenga

Kang³

et al. 2017

J Soc Info Display

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We present an accelerated SmartSpice model that can detect dynamic threshold voltage shift (ΔVth)‐related failure of an oxide thin‐film transistor (TFT)‐based gate driver. During gate driver operation, the alternating HIGH and LOW input signals repeatedly stress and relax the TFT components of the gate driver. Because oxide TFTs do not recover completely during the LOW input level, ΔVth cumulated during the HIGH input levels may result in failure of gate drivers. For correct failure analysis, a TFT model that can detect dynamic ΔVth is, therefore, needed to replace current TFT models, as they cannot account for dynamic ΔVth. The model presented herein works correctly with varying temperature and input signals of any shape.

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DC Versus Pulse-Type Negative Bias Stress Effects on the Instability of Amorphous InGaZnO Transistors Under Light Illumination

Cited by 20 publications

References 11 publications

Electrical characteristics of InGaZnO thin film transistor prepared by co-sputtering dual InGaZnO and ZnO targets

Electrical characteristics of InGaZnO thin film transistor prepared by co-sputtering dual InGaZnO and ZnO targets

Exploring the photoleakage current and photoinduced negative bias instability in amorphous InGaZnO thin-film transistors with various active layer thicknesses

Spice model for detection of dynamic threshold voltage shift during failure analysis of oxide TFT‐based AMD gate drivers

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