Defect Self‐Compensation for High‐Mobility Bilayer InGaZnO/In₂O₃ Thin‐Film Transistor

Abstract

amorphous IGZO (a-IGZO) TFT was fabricated by Hosono and coworkers and presented impressive electron mobility and current on/off ratio. [10,11] Taking advantage of their excellent optical transparency, high mechanical flexibility, and especially low-temperature process feasibility, the amorphous oxide semiconducting (AOS) TFTs have triggered large scientific interests and industrial benefits, and can be widely used in active-matrix liquid crystal display, bio-and optical sensing fields, etc. [12] However, disordered structural network and high density of intrinsic defects in the AOS materials largely affect electrical performances (e.g., electron mobility and stability) of the TFTs and limit their industrial applications in next-generation electronic device platforms. To overcome these limitations, a notable strategy, i.e., stackedlayer channel combining different individual oxide semiconducting materials, has been proposed in recent years and successfully implemented to enhance the device performances. [13][14][15][16][17][18][19] Park and Lee reported a bilayer IZO/IGZO TFT with the field-effect mobility (μ FE ) of 47.7 cm 2 V −1 s −1 and threshold voltage (V TH ) of 1.57 V, where the mobility enhancement (i.e., ≈2.3 times higher than that of a single-layer IGZO TFT) was induced by a high electron density of the IGZO layer with electrons injected from the IZO layer of the stacked structure. [13] Liu et al. presented Here, the bilayer InGaZnO/In 2 O 3 thin-film transistors (TFTs) are deposited by radio-frequency magnetron sputtering at room temperature. A high field-effect mobility (μ FE ) of 64.4 cm 2 V −1 s −1 and a small subthreshold swing (SS) of 204 mV per decade are achieved in the bilayer-stack TFTs fabricated upon SiO 2 /Si substrate, with large improvement compared to the singlelayer InGaZnO and In 2 O 3 TFTs. Implementing HfO 2 and Si 3 N 4 as high-k gate dielectrics, μ FE and SS are correspondingly enhanced to be 67.5 and 79.1 cm 2 V −1 s −1 , and 85 and 92 mV per decade in the bilayer TFTs. Defect self-compensation effect is also revealed, i.e., (In) + + (O) − → In − O, while, respectively, considering the indium-and oxygen-related defects in InGaZnO and In 2 O 3 and exploring the numerical simulations in SILVACO/Atlas (for electrical performance) and Quantum Espresso (for physical analysis). The InO formation can result in a significant reduction in defect density (validated by the X-ray photoelectron spectra and low-frequency noise characterizations) and therefore improvement of μ FE and SS in the bilayerstack TFT. The important role of defect self-compensation mechanism while combining different individual channel layers in the oxide semiconducting TFTs is underlined and highly potential application in next-generation, fast-speed flexible displays is shown.

Recent Advances of Solution-Processed Heterojunction Oxide Thin-Film Transistors

“…In 2016, Cong et al built quasi-double-channel (QDC) AlSnZnO (ATZO) TFTs with a superior mobility of 108 cm 2 /Vs and an on/off ratio of 10 9 [36]. In 2019, He et al prepared InGaZnO/In 2 O 3 (IGZO/In 2 O 3 ) TFTs by magnetron sputtering at room temperature, exhibiting high mobility (64.4 cm 2 /Vs) and high on/off ratio (10 7 ), with large enhancement compared with single-layer IGZO and In 2 O 3 TFTs [39]. They attributed this improvement to the defect self-compensation mechanism between the two layers.…”

Robust In-Zn-O Thin-Film Transistors with a Bilayer Heterostructure Design and a Low-Temperature Fabrication Process Using Vacuum and Solution Deposited Layers

“…In the bilayer, defect self-compensation could be responsible for the improved electrical properties 22 , 27 as oxygen interstitials (O i ) or peroxide (O–O) defects in the high-density layer can compensate O vacancies (voids) present in a lower-density layer. 28 Normally, a channel exists right above the interface between the semiconductor and dielectric layer. In our case, the buffer layer is critical for the electron transport during the on state.…”

Recent progress and perspectives on atomic‐layer‐deposited semiconducting oxides for transistor applications

“…A high μ FE value for oxide TFTs is also required for large AMOLED devices to satisfy ever‐increasing demands for larger screens with higher resolutions, faster frame rates, and lower power consumption, as shown in Figure 1. Researchers have investigated approaches such as bilayer channel structures, 9,10 cation composition optimization, 11 metal‐induced crystallization, 12,13 and dual‐gate architecture 14,15 to boost the drivability of the drain current ( I D ). To date, most of these studies have been based on physical vapor deposition and sputtering to prepare the semiconducting n‐type oxide layer.…”