Demonstration of an InGaAs gate stack with sufficient PBTI reliability by thermal budget optimization, nitridation, high-k material choice, and interface dipole

LaSiO x - and Al2O3-Inserted Low-Temperature Gate-Stacks for Improved BTI Reliability in 3-D Sequential Integration

“…8 summarizes the electron mobility in samples with LaSiOx, where a clear mobility improvement can be observed. For hole mobility in Al2O3-inserted gate stack: despite the reported defectivity of Al2O3 [17,18,19], which may induce additional remote coulomb scattering (RCS [29]) and degrade the carrier mobility, only marginal (or no) mobility degradation is observed [Fig. 9(a)].…”

“…To further evaluate the potential impact from oxide defects, we plot the previously calibrated defect bands based on either Si or Ⅲ-Ⅴ channels in Fig. 9(b) [16,18]: the defect band tails around -1.2eV (around Si valence band edge Ev) and therefore it could possibly degrade the hole mobility due to RCS. However, based on the extracted hole mobility (marginal or no mobility degradation), we consider the marginal impact of Al2O3 defect on hole mobility, may be due to either the ultrathin Al2O3 layer deployed in this work, or from the compensating roles between the additional Al2O3 defects and the reduced RCS impact from the high-k defects.…”

“…Based on the result, both LaSiOx and Al2O3-inserted gate stacks are integrated in planar transistors and the improved BTI reliability is confirmed: the observed improvement exceeds typical EOT ("constant Eox") scaling trend and is therefore attributed to the LaSiOx or Al2O3 induced defect band decoupling (shifted away from channel carrier Fermi-level Ef). Second, we evaluate the channel carrier mobility: improved electron mobility is observed in sample with LaSiOx; despite the reported defectiveness of Al2O3 (e.g., on Ⅲ-Ⅴ channel [17,18,19]), marginal or no hole mobility degradation is observed. Third, a complementary study of nMOSFET with Al2O3 and pMOSFET with LaSiOx inserted gate stack is performed: the closer correlation between carrier mobility and BTI reliability is consolidated; furthermore, an opposite trend between PBTI and NBTI reliability in samples with identical insertion layer (LaSiOx or Al2O3) is revealed.…”

On The Development of a Reliable Gate Stack for Future Technology Nodes Based on III-V Materials

“…When scaling the HfO 2 to 2 nm (C''), a CET of 1.46 nm (EOT of 1.06 nm) is achieved with a Figure 13: Defect density profile obtained by modeling the ΔV th vs V gate as described in [25]. Insertion of the IL layer causes narrowing of the shallow defect band, thus enhancing γ and shifting the mean defect level of this band to shallower energy [19] but increases the density of defects at deeper energies. Insertion of LaSiO x consistently reduces the total defect density (both shallow and deep energies).…”

“…However, with the requirement of a thin Al 2 O 3 layer for gate stack thermal stability and due to the wide defect distribution in Al 2 O 3 , the total density of charging oxide traps was still higher than the target (10 years reliability target: flat-band voltage shift, ΔV fb < 30 mV at 125°C. Assuming a typical time power law exponent of 0.13, the failure criterion projects effective density of charged defects, ΔN eff to < 3x10 10 /cm 2 at operating field, for an Effective Oxide Thickness (EOT) of 1 nm [18,19]).…”