Emerging non-volatile memories (e.g. STT-MRAM, OxRRAM and CBRAM) based on resistive switching al'e undel' intense R&D investigation by both academics and industl"ies. They provide high performance such as fast wl'ite/read speed, low power and good enduJ"ance (e.g. >10 12 ) beyond Flash memOl·ies. Howevel' the conventional access architecture based on 1 transistor + 1 memOl'y cell limits its storage density as the selection tJ"ansistol' should be lal'ge enough to enSut'e enough CutTent fOl' the switching opeJ"ation, This papel' describes a design of crossbar al'chitecture based on 2R complementary I'esistive switching memol'y cell, This at'chitectut'e allows fewel' selection transistOl's, and minimum contacts between memory cells and CMOS control circuits, The complementary cell and pat'allel data sensing mitigate the impact of sneak CutTents in the crossbar architectut'e, We performed transient simulations based on two memOl), technologies: STT-MRAM and OxRRAM to validate the functionality of this design by using CMOS 65 nm design kit and memOl), compact models,