Design and analysis of 8 bit fully segmented digital to analog converter

Abstract

This paper presents design of an 8-bit 1.8V fully segmented digital to analog converter (DAC) using 180nm CMOS technology. DAC is an essential part of digital signal processor. Digital to analog converter is employed in processing of digital signals and providing analog output in the form of current or voltage for corresponding binary input. The differential non linearity of a DAC shows variation in output corresponding to 1LSB change at input that is accuracy of data conversion. To achieve low non linearity or more accurate data conversion a DAC is designed with unary coding or a fully segmented digital to analog converter with current steering technique. The INL and DNL achieved in this research work are 0.145LSB and 0.013LSB respectively. The power consumption is simulated as 99.67mW.

Binary-Weighted DAC using W-2W Current Mirror Topology

“…The ratio of N-bit conventional DAC verses W-2W binary weighted DAC is given by equation (2), where factor 2N/α is switch size and α is always > 1.…”

“…Progress of Very Large Scale Integration (VLSI) technology helps to implement many mixed-signal Integrated Circuits (ICs) in a single chip, including data conversion circuits [1][2]. DACs are at the beginning of the analog signal chain, which makes them very important to system performance [6][7].…”