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This paper describes implementation of an offset quadrature phase shift keying (OQPSK)-pulse-shaping block as a part of digital transmitter. The implementation is based on 2.4 GHz-band IEEE 802.15.4 standard. In this paper, the implementation results are compared to the results of OQPSK modulator and pulse-shaping block in terms of simulation waveform, design size, and synthesis run time. These blocks were designed using Verilog code through Xilinx ISE as a new design method and been implemented on Spartan3E XC3S500E field programmable gate array (FPGA). Current review shows that configurations for the implementation of OQPSK-pulse-shaping block, require 26.4% slices, 22.9% sliced flip-flops, and 15.5% look-up tables (LUTs), which is much better than the results of OQPSK modulator and pulseshaping block. At clock frequencies of 2 MHz and 25 MHz, the synthesis run time for OQPSK-pulse-shaping block shows substantial improvement with 48 ns faster than the two blocks.

Existing works on battery-less of energy harvesting systems often assume as a high efficiency of rectifier circuit for power management system. In practice, rectifier circuit often varies with output power and circuit complexity. In this paper, based on a review of existing rectifier circuits for the energy harvesters in the literature, an integrated rectifier with boost converter for output power enhancement and complexity reduction of power management system is implemented through 0.18-micron CMOS process. Based on this topology and technology, low threshold-voltage of MOSFETs is used instead of diodes in order to reduce the power losses of the integrated rectifier circuit. Besides, a single switch with the duty-cycle control is introduced to reduce the complexities of the integrated boost converter. Measurement results show that the realistic performances of the rectifier circuit could be considerably improved based on the performances showed by the existing study.

<span>In this paper, a low power consumption linear power amplifier (PA) for Bluetooth Low Energy (BLE) application is presented. An analogue pre-distorter (APD) is integrated to the PA. The APD consist of an active inductor, driver amplifier, and a RC phase linearizer. The PA delivers more than 12dB power gain from 2.4GHz to 2.5GHz. At the center frequency of 2.45GHz, the gain of the PA is 13dB with PAE of 26.7% and maximum output power of 14dBm. The corresponding OIP3 is 27.6dBm. The supply voltage headroom of this PA is 1.8V. The propose APD serves to be a solution to improve the linearity of the PA with minimum trade-off to the power consumption.</span>

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