Design and Analysis of Fault-Tolerant Systems for Industrial Applications

Johnson, B.W.

doi:10.1007/978-3-642-75002-1_5

Cited by 135 publications

(221 citation statements)

References 14 publications

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“…The basic idea is, for each time, two copies of the original task are inserted into the task graph together. When the results from these three tasks are different, majority voting [15] is used to decide the correct value (this is also called Triple Module Redundancy (TMR) [15]). Table 5 shows the number of original tasks duplicated by two versions of S_R_INC schedule algorithms, single duplication vs. double duplication.…”

Section: Resultsmentioning

confidence: 99%

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Reliability-aware Co-synthesis for Embedded Systems

Xie

Kandemir

et al. 2007

J VLSI Sign Process Syst Sign Im

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As technology scales, transient faults have emerged as a key challenge for reliable embedded system design. This paper proposes a design methodology that incorporates reliability into hardware-software co-design paradigm for embedded systems. We introduce an allocation and scheduling algorithm that efficiently handles conditional execution in multi-rate embedded systems, and selectively duplicates critical tasks to detect or correct transient errors, such that the reliability of the system is improved. Two methods are proposed to insert duplicated tasks into the schedule. The improved reliability is achieved by utilizing the otherwise idle computation resources and taking advantage of the overlapping schedule for mutually exclusive tasks in the conditional task graph, such that it incurs no resource or performance penalty.

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Section: Resultsmentioning

confidence: 99%

“…System reliability can be ensured by using different redundancy techniques, such as hardware redundancy, software redundancy, information redundancy, and time redundancy [15]. Various methods for reducing the transient faults in deep submicron ICs have been proposed [2,[7][8][9][10]16].…”

Section: Related Workmentioning

confidence: 99%

Reliability-aware Co-synthesis for Embedded Systems

Xie

Kandemir

et al. 2007

J VLSI Sign Process Syst Sign Im

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“…Mission and safety-critical applications, by default, employ redundancy in system design to overcome any arbitrary function module fault(s)/failure(s) to provide correct and uninterrupted operation [1]. The function module deployed could be any circuit/system that is duplicated as per need to construct a redundant system.…”

Section: Introductionmentioning

confidence: 99%

A distributed minority and majority voting based redundancy scheme

Balasubramanian

Maskell

2015

Microelectronics Reliability

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“…In safety-critical applications, ranging from national defense to interests of commercial companies and private citizens, techniques of fault tolerant computing are important and effective to improve the reliability and dependability of real-time systems [1,7,8].…”

Section: Introductionmentioning

confidence: 99%

Parametric Analysis of an Improved Fault Tolerant System

Zhang

Qin

2008

Electronic Notes in Theoretical Computer Science

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We report our preliminary study on an improved triple modular computer system from the aerospace field, which is designed to compute the course of action that other subsystems take and output the result to other subsystems. Based on the formal model of the system, we derive constraints on the values of the parameters that occur in our model, and manually prove that " When a CPU is in the startup phase, it should not restart again due to its watchdog timer overflow or a restart signal sent from the arbitrator ".

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Design and Analysis of Fault-Tolerant Systems for Industrial Applications

Cited by 135 publications

References 14 publications

Reliability-aware Co-synthesis for Embedded Systems

Reliability-aware Co-synthesis for Embedded Systems

A distributed minority and majority voting based redundancy scheme

Parametric Analysis of an Improved Fault Tolerant System

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