2022
DOI: 10.1088/1361-6641/ac86e9
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Design and performance analysis of gate-all-around negative capacitance dopingless nanowire tunnel field effect transistor

Abstract: In this paper, a novel low power consumption device based on dopingless gate all around nanowire tunnel field effect transistor with negative capacitance effect is proposed. Negative capacitance is a robust approach in solving the bottleneck issues encountered by devices operating in nanoscale domains. Additionally, VT and SS are dropped significantly to less than 60mV/decade. Negative capacitance makes significant contribution to the device performance by lowering operating voltage for low power applications.… Show more

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Cited by 13 publications
(3 citation statements)
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“…Scaling MOSFETs became perilous as CMOS technology was scaled down to ever smaller nodes, causing MOS devices to encounter critical issues related to Short Channel Effects (SCEs) with poor gate control [12][13][14][15]. Advances in material-based technology that improve semiconductor devices by using graphene, plasmonic techniques, metamaterials, nanoparticles, and negative capacitance for improving materialistic properties such as energy bandgap controlling, quantum well introduction, and the production of ferroelectric domains for use in next generation ICs have piqued the interest of researchers in specific fields [16][17][18]. The charge plasma dopingless technique is renowned for keeping appropriate metal work functions for the source and drain regions in short-channel devices by eliminating doping [19].…”
Section: Introductionmentioning
confidence: 99%
“…Scaling MOSFETs became perilous as CMOS technology was scaled down to ever smaller nodes, causing MOS devices to encounter critical issues related to Short Channel Effects (SCEs) with poor gate control [12][13][14][15]. Advances in material-based technology that improve semiconductor devices by using graphene, plasmonic techniques, metamaterials, nanoparticles, and negative capacitance for improving materialistic properties such as energy bandgap controlling, quantum well introduction, and the production of ferroelectric domains for use in next generation ICs have piqued the interest of researchers in specific fields [16][17][18]. The charge plasma dopingless technique is renowned for keeping appropriate metal work functions for the source and drain regions in short-channel devices by eliminating doping [19].…”
Section: Introductionmentioning
confidence: 99%
“…Heavy doping has become a serious issue as it degrades the device’s performance. The issue raised by JL NW FETs can be addressed by a dopingless technique called charge plasma [ 14 , 15 ]. This dopingless concept has been applied to MOSFETs, Tunnel FETs (TFETs) and to GAA NW FETs [ 16 ].…”
Section: Introductionmentioning
confidence: 99%
“…The reason Fe-FETs are able to overcome physical limitations is due to the negative capacitance property of the ferroelectric layer, which can display a subthreshold swing (SS) of less than 60 mV/decade through dipole switching and arrangement [2][3][4][5][6]. In comparison to conventional MOSFETs, a lower threshold voltage (V TH ) can be achieved for Fe-FETs with an ultrasteep SS, which leads to a reduction in the applied voltage (V DD ) for a given gate overdrive voltage (V G − V TH ) [7][8][9].…”
Section: Introductionmentioning
confidence: 99%