Design and Process Optimization of Through Silicon via Interposer for 3d-Ic Integration

Monajemi, P.; Newman, Michael; Uzoh, Cyprian; Woychik, Charles G.; Caskey, Terrence C.

doi:10.4071/isom-2012-tp16

Cited by 3 publications

References 3 publications

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Development of the technology to control the spatial distribution of plasma using double ICP coil

Sakuishi

Murayama

Morikawa

et al. 2014

2014 IEEE 64th Electronic Components and Technology Conference (ECTC)

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With the shrink of TSV diameter, smoothness of side wall and taper angle control become more and more important. We have developed scallop free etching by direct etching method. Direct etching method is continuous, not cyclical etching and deposition. Scallop does not occur in principle. Double ICP antenna newly developed has good controllability of side wall taper angle. IntroductionData traffic is increasing explosively with the spread of mobile devices such as mobile phone and tablet PC. Data server required high-speed processing and low power consumption. Devices used in these equipments are required high-speed processing, high density packaging and low power consumption. One of the most powerful way to achieve these requirements are 2.5D and 3D packaging using TSV. Via diameter becomes 10um or less, subsequent deposition process becomes difficult, because of high aspect ratio. Sidewall smoothness and controllability of taper angle have significant influence on the reliability and production costs. We have developed scallop-free etching using double ICP antenna. In this paper, we focused on the controllability of taper angle. Scallop-free and taper etching is expected to improve the reliability and production costs of liner/barrier seed layer deposition. Figure1. shows the etched profile by conventional method and our countermeasures.

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Development of the technology to control the spatial distribution of plasma using double ICP coil

Sakuishi

Murayama

Morikawa

et al. 2014

2014 IEEE 64th Electronic Components and Technology Conference (ECTC)

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Advantage of direct etching method and process integration for TSV reliability

Sakuishi¹,

Murayama²,

Morikawa³

2015

2015 International Conference on Electronic Packaging and iMAPS All Asia Conference (ICEP-IAAC)

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Cost Comparison of 2.5D/3D Packaging to other Packaging Technologies

Palesko¹,

Palesko²,

Vardaman³

2013

International Symposium on Microelectronics

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2.5D and 3D applications using through silicon vias (TSVs) are increasingly being considered as an alternative to conventional packaging. Miniaturization and high performance product requirements are driving this move, although in many cases the cost of both 2.5D and 3D is still high. In this paper we will identify the major cost drivers for 2.5D and 3D packaging and assess cost reduction progress, including current costs versus expected future costs. We will also compare these costs to alternative packaging.

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Design and Process Optimization of Through Silicon via Interposer for 3d-Ic Integration

Cited by 3 publications

References 3 publications

Development of the technology to control the spatial distribution of plasma using double ICP coil

Development of the technology to control the spatial distribution of plasma using double ICP coil

Advantage of direct etching method and process integration for TSV reliability

Cost Comparison of 2.5D/3D Packaging to other Packaging Technologies

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