Design and simulation of hybrid CMOS–SET circuits

Jana, Anirban; Singh, N. Basanta; Sing, Jamuna Kanta; Sarkar, Subir Kumar

doi:10.1016/j.microrel.2012.11.001

Cited by 30 publications

(6 citation statements)

References 13 publications

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“…This particular switch is to be compared with other post CMOS HCS models. Here one significant partial difference is that the SETMOS switch attempted by Sarkar et al, [13] are connected in parallel and thereby the propagation delay in the circuit cannot be ruled out completely. The same said factor is considerably eliminated in SS switch.…”

Section: Macro Modelling Of Single Electronmentioning

confidence: 99%

Smart Implementation of SS Hybrid Single Electron Model and its Simulation using MATLAB

Bhadra¹,

Banerjee²,

Das³

et al. 2022

IJRASET

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The authors present a novel simulation technique for simulating nanodevices. Single Electronics (SE) is a blessing for both business and academia in the post-CMOS age. Due to SE's inherent drawbacks, including its low gain, unpredictable back ground charge creation, and demand for a very low room temperature during manufacturing, it hasn't yet been decided whether it will be the only mode to replace CMOS. This SE-CMOS hybridization is anticipated to bring about great satisfaction in the development of practical and more dependable nanodevice constructions. The delicate part is that this hybridization necessitates the use of two unique simulators in order to replicate a single model. Unfortunately, this causes hybrid model simulation to be quite difficult. On the other hand, the idea of macro-modeling the hybrid models for the purpose of simulation is in fact beneficial. In this instance, the authors utilized one such macro-model to improvise the hybrid SE model, and a very new SS hybrid SE model is subsequently produced. The majority of the research on hybrid SE that has been published so far supports the use of two different simulators, such as SPICE and SIMON; both are sequentially utilized to simulate one particular model, which ultimately takes a lot of time. The authors take a step ahead in this section by simulating the proposed SS hybrid SE model in MATLAB. They predict that this model may eventually be added to SIMULINK's SIMSCAPE since it is more accurate, less time-consuming, and easier to understand.

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Section: Macro Modelling Of Single Electronmentioning

confidence: 99%

Smart Implementation of SS Hybrid Single Electron Model and its Simulation using MATLAB

Bhadra¹,

Banerjee²,

Das³

et al. 2022

IJRASET

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“…On the other hand, CMOS has higher gain and current drive features that can compensate the basic drawbacks of single electron transistor. That is why hybridization [5,6] is needed between SET & CMOS, capable to revolutionize our present nano-technological aspects [7,9]. We have used the well-known MIB model for SET that obeys the "orthodox theory" developed by K.Likharev [1] which approximates, ignorance of electron energy quantization inside the conductor tunnelling time through the barrier to be negligible at an order of 10 -15 sec.…”

Section: Realization Of Hybrid Set-cmosmentioning

confidence: 99%

“…HYBRID SET-CMOS BASED OCTAL TO BINARY ENCODER Fig.3 reflects octal to binary encoder with CMOS-SET hybridization [5]. Required voltages to drive them are connected accordingly.…”

Section: Y1 = V2 + V3 + V6 + V7mentioning

confidence: 99%

See 1 more Smart Citation

Hybrid single electron transistor based octal to binary encoder in 22 nanometer technology

Mukherjee

Jana

et al. 2014

2014 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT)

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The co fabrication of S ET & CMOS technology has already proved its ability to bring a drastic change in the era of nanodimensional devices. In our present work a well known combinational circuit, octal to binary encoder is demonstrated using hybrid S ET-CMOS technology in 22 nanometer node. We have presented power analysis for the circuit here. Power delay product for the circuit has also been done and a comparison is made with the conventional CMOS based circuit. S imulations are done using TCAD with the help of MIB model and BS IM4.6.1 model to establish the feasibility of the proposed model in case of room temperature operation.

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“…Hybridization of SET with CMOS technology has emerged as a promising candidate for the next generation ultra-small [19][20][21], lowpower, high-speed Nano device. To understand the characteristics of SET-based circuits and explore its applications, simulation and modeling of this device has become of great importance [22][23][24][25]. SET simulation in general is based on three approaches, analytical modeling [26], macro-modeling [27] and the Monte Carlo method [28].…”

Section: Introductionmentioning

confidence: 99%

Design and simulation of hybrid SET-CMOS inverter using macro-model technique

et al. 2022

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The single-electron transistor (SET) is one of the frontier device that can offer high operating speed at an ultra-low power consumption. SET macro-modeling, can be used for a SET-CMOS circuit simulation. In this work, we develop a new macro model of SET- CMOS hybrid whose is very useful effect in VLSI circuits design. All simulations are performed using environment SIMSCAPE of MATLAB SIMULINK. This architecture were realized by implementing the NMOS of conventional inverter with a SET macro-model. The simulation results show that the hybrid structure offers better performance. Indeed, the designed circuits are able to work at room temperature.

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Design and simulation of hybrid CMOS–SET circuits

Cited by 30 publications

References 13 publications

Smart Implementation of SS Hybrid Single Electron Model and its Simulation using MATLAB

Smart Implementation of SS Hybrid Single Electron Model and its Simulation using MATLAB

Hybrid single electron transistor based octal to binary encoder in 22 nanometer technology

Design and simulation of hybrid SET-CMOS inverter using macro-model technique

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