Design, Characterization and Analysis of a 0.35 μm CMOS SPAD

Abstract

Most of the works about single-photon detectors rely on Single Photon Avalanche Diodes (SPADs) designed with dedicated technological processes in order to achieve single-photon sensitivity and excellent timing resolution. Instead, this paper focuses on the implementation of high-performance SPADs detectors manufactured in a standard 0.35-micron opto-CMOS technology provided by AMS. We propose a series of low-noise SPADs designed with a variable pitch from 20 μm down to 5 μm. This opens the further way to the integration of large arrays of optimized SPAD pixels with pitch of a few micrometers in order to provide high-resolution single-photon imagers. We experimentally demonstrate that a 20-micron SPAD appears as the most relevant detector in terms of Signal-to-Noise ratio, enabling emergence of large arrays of SPAD.

Application of CMOS Technology to Silicon Photomultiplier Sensors

“…However, the problem here is at the edges of the junction, as the photodiode should be surrounded by a suitable guard ring (GR) to smooth the charge concentration and avoid the occurrence of local breakdown. Such guard rings are often implemented as regions with smaller doping levels (n-well structures or p-well implants) surrounding the active part of the sensor and lowering the electric field at the borders of the diode [ 29 , 46 ]. Implementing such GR structures at CMOS nodes smaller than 250 nm requires the violation of standard rules and may create non-uniformities in the obtained wells—in particular at the annealing stage—if the CMOS fabrication processes are used without any special consideration of this modified requirement.…”

“…In our case, the STI contributes to the electric isolation of individual avalanche pixel sensor, allowing the necessary electric crosstalk protection of the SiPM microcells. The STI can be used functionally as a guard ring, physically removing the peripheral regions of the p /n-junction [ 29 , 46 ]. Up to now, this option is under investigation, due to the problem of generation of additional leakage current [ 65 ].…”

“…The CMOS technology offers few possibilities of implementing such guard rings [ 19 , 20 , 21 , 22 ]. By way of example, SPAD, SPAD arrays, and SiPM detection structures with several possible layout techniques for the implementation of guard rings were successfully implemented in 800 nm [ 10 , 23 , 24 , 25 , 26 , 27 , 28 , 29 , 30 ], 700 nm [ 31 ], 500 nm [ 32 , 33 ], 350 nm [ 18 , 34 , 35 , 36 , 37 , 38 , 39 , 40 , 41 , 42 , 43 , 44 , 45 , 46 ], 180 nm [ 47 , 48 , 49 ], 150 nm [ 50 ], 130 nm [ 15 , 51 , 52 , 53 , 54 , 55 ], and 90 nm [ 56 , 57 ] CMOS nodes, and were used to detect single photon signals on the basis of the avalanche breakdown process. Two main limitations of the CMOS technology remain; namely, the higher dark rate and the lower photon detection efficiency with respect to the custom-technology-based conventional SiPMs.…”

Single-photon avalanche diodes in 018-μm high-voltage CMOS technology

“…Up to date, SPADs have been fabricated with or without customization in many CMOS technology nodes from 0.8 μm to 65 nm in standard, high-voltage (HV), and imaging processes [14][15][16][17][18][19][20][21][22][23][24][25]. To boost the operation speed of the chips, advanced technology nodes are preferred.…”

The Gamma Cube: a new way to explore the gamma-ray sky

“…A high-resolution -few 10 µm -imager sensitive to a single photon is actually developed by using an array of SPADs with a standard CMOS micro-electronic technology (AMS Opto CMOS 0.35 µm) [5]. Summation of Single Photon Avalanche photo Diode array signals allow efficient calorimetry and are known under the name of SiPM (Silicon Photo-Multiplier).…”