2013
DOI: 10.1016/j.mssp.2012.09.019
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Design considerations of underlapped source/drain regions with the Gaussian doping profile in nano-double-gate MOSFETs: A quantum simulation

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Cited by 4 publications
(1 citation statement)
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“…The current research in this field is largely geared toward an increasing of the device density through an aggressive scaling of the device-feature sizes [1], and an improvement of the MOSFETstructure performances such as those of the double-gate (DG) MOSFETs [2][3][4], nano-wire FETs [5][6][7], nanoscale FinFETs [8,9], and nano-tube transistors [10]. As the channel length of the MOSFETs continues to shrink to several tens of nanometers, the source-to-drain and gate-tunneling of these near-ballistic devices and the inversion layers that are of a several-nanometer thickness, which are in the MOSFETs, become important issues [11].…”
Section: Introductionmentioning
confidence: 99%
“…The current research in this field is largely geared toward an increasing of the device density through an aggressive scaling of the device-feature sizes [1], and an improvement of the MOSFETstructure performances such as those of the double-gate (DG) MOSFETs [2][3][4], nano-wire FETs [5][6][7], nanoscale FinFETs [8,9], and nano-tube transistors [10]. As the channel length of the MOSFETs continues to shrink to several tens of nanometers, the source-to-drain and gate-tunneling of these near-ballistic devices and the inversion layers that are of a several-nanometer thickness, which are in the MOSFETs, become important issues [11].…”
Section: Introductionmentioning
confidence: 99%