Design-in for EMC on CMOS large-scale integrated circuits

Steinecke, T.

doi:10.1109/isemc.2001.950505

Cited by 21 publications

(6 citation statements)

References 2 publications

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“…The simplest approach for reducing the electromagnetic emissions produced by a circuit consists of reducing its dynamic power consumption. Several techniques exist for synchronous designs [7] to reduce their electromagnetic emissions, like the Spread Spectrum Clock [8], the Globally Asynchronous Locally Synchronous (GALS) design [9], or the design flow for optimization noise in user-defined frequency bands proposed in [10]. Nevertheless, the clocked activity still produces periodic current pulses, generating harmonics in the electromagnetic spectrum.…”

Section: Related Workmentioning

confidence: 99%

High Level Current Modeling for Shaping Electromagnetic Emissions in Micropipeline Circuits

Germain

Engels

Fesquet

2019

JLPEA

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In order to fit circuit electromagnetic emissions within a spectral mask, a design flow based on high level current modeling for micropipeline circuits is proposed. The model produces a quick and rough estimation of the circuit current, thanks to a Timed Petri Net determining the activation instants of the different micropipeline stages and an asymmetric Laplace distribution modeling the current peaks of the activated stages. The design flow exploits this current estimation for shaping the electromagnetic emissions by setting the controller delays of the micropipeline circuits. The delay adjustment is performed by a genetic algorithm, which iterates until the electromagnetic emissions match the targeted spectral mask. In order to evaluate the technique, an Advanced Encryption Standard (AES) circuit has been designed. We first observed that the obtained current curve fits well with a gate simulation. Then, after shaping the electromagnetic emissions, the simulation shows that the spectrum fits within the spectral mask.

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Section: Related Workmentioning

confidence: 99%

High Level Current Modeling for Shaping Electromagnetic Emissions in Micropipeline Circuits

Germain

Engels

Fesquet

2019

JLPEA

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“…In complex ICs, not all on-chip functionality is needed simultaneously. As a result, clocks may be disabled to minimize power and/or eliminate leakage currents [44].…”

Section: B Research Work Related To Parasitic Emissions Ofmentioning

confidence: 99%

The Electromagnetic Compatibility of Integrated Circuits—Past, Present, and Future

Ramdani

Sicard

Boyer

et al. 2009

IEEE Trans. Electromagn. Compat.

282

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Throughout the decades of continuous advances in semiconductor technology, from the discrete devices of the late 1950s to today's billon-transistor system-on-chip, there have always been concerns about the ability of components to operate safely in an increasingly disruptive electromagnetic environment. This paper provides a nonexhaustive review of the research work conducted in the field of electromagnetic compatibility (EMC) at the IC level over the past 40 years. It also brings together a collection of information and trends in IC technology, in order to build a tentative roadmap for the EMC of ICs until the year 2020, with a focus on measurement methods and modeling approaches.

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“…EMC of the circuits prior to production is required to predict the performance of EMC. Researchers have been developing methods of measurement and designing techniques to improve the performance of ICs [1][2][3][4][5][6][7][8][9][10][11][12][13][14]. EM compatibility testing is usually performed after the design stage and before placing the IC on the printed circuit board.…”

Section: Introductionmentioning

confidence: 99%

“…For this reason, a model is needed to accurately and rapidly presume EM compliance. Several measurement methods for the emission of ICs have been created [1][2][3][4][5][6][7][8][9][10][11][12][13][14]. One method is the linear equivalent circuit and current source (LECCS) model, which has been used for the prediction * Correspondence: mebasak@yildiz.edu.tr of emissions and immunity tasks [6].…”

Section: Introductionmentioning

confidence: 99%

RLC circuit extraction with the differential evolution algorithm for conducted electromagnetic emission model of integrated circuits

Başak¹,

Kuntman²

2016

Turk J Elec Eng & Comp Sci

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This paper examines the modeling of conducted electromagnetic emissions of integrated circuits. In this study, test circuits were designed and printed circuit boards were prepared to measure the input impedance at the power supply pin of the microcontroller. After S-parameter measurements of the test circuit were performed in a frequency range of 10 MHz to 2 GHz, Z-parameters were obtained via S-parameters. Next, the impedance-frequency curve of the test circuit's power supply pin, which consists of a microcontroller core, printed circuit board, conductive trace, and SMA connector global impedances, was obtained. Therefore, all the traces, printed circuit board, and SMA connector impedance effects were eliminated with the deembedding technique. After all other impedance effects were deleted with the deembedding technique, the input impedance at the power supply pin of the microcontroller was obtained and shown with impedance-frequency characteristics. The passive (RLC) circuit was modeled from this curve and the results were compared to the measurements. The differential evolution algorithm was used to extract the optimal RLC passive elements. Finally, sensitivity analyses were successfully performed to ensure the accuracy of the extracted circuit.

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Design-in for EMC on CMOS large-scale integrated circuits

Cited by 21 publications

References 2 publications

High Level Current Modeling for Shaping Electromagnetic Emissions in Micropipeline Circuits

High Level Current Modeling for Shaping Electromagnetic Emissions in Micropipeline Circuits

The Electromagnetic Compatibility of Integrated Circuits—Past, Present, and Future

RLC circuit extraction with the differential evolution algorithm for conducted electromagnetic emission model of integrated circuits

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