Design of 7T FinFET based SRAM cell design for nanometer regime

Sneha, G.; Krishna, B. Hari; Kumar, C. Ashok

doi:10.1109/icisc.2017.8068657

Cited by 10 publications

(4 citation statements)

References 12 publications

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“…6. The 7T (7Transistor) cell design [29][30] includes 2-CC inverters, namely (XM3, XM4, XM5, and XM6) with an additional transistor (XM7) that is linked to the WL. Also, dual access transistors (XM1, XM2) are attached with the BL and BLB, respectively.…”

Section: Finfet-7t Sram Cellmentioning

confidence: 99%

See 1 more Smart Citation

A Review On Sram Memory Design Using Finfet Technology

Lakshmi¹,

Kamaraju²

2022

Preprint

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An innovative technology named FinFET (Fin Field Effect Transistor) has been developed to offer better transistor circuit design and to balance the necessity of superior storage system (SS). As gate loses control over the channel, CMOS devices face some major issues like increase in manufacturing cost, less reliability and yield, increase of ON current, short channel effects (SCEs), increase in leakage currents etc. However, the memory must have less power dissipation, short access time and low leakage current. The traditional design of SRAM (Static RAM) using CMOS technology represents severe performance degradation due to its higher power dissipation and leakage current. Thus, a Nano-scaled device named FinFET is introduced for designing SRAM since it has three dimensional (3D) design of the gate. FinFET has been used to improve the overall performance, which includes efficiency, power, and area. Moreover, FinFET has been chosen as a transistor of choice because it is not affected by SCEs. In this work, we have reviewed various FinFET based SRAM cells, performance metrics and the comparison over different technologies.

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Section: Finfet-7t Sram Cellmentioning

confidence: 99%

“…This section describes the analysis for the various SRAM cell at different nm (nanometer) technology. 5 denotes the comparison of 7T with other SRAM cells [30], and the simulation tool used is Tanner. Table 6 indicates the comparative analysis of 7T SRAM [20] in H-spice tool.…”

Section: Analysis Of Sram Finfets Using Various Technologiesmentioning

confidence: 99%

A Review On Sram Memory Design Using Finfet Technology

Lakshmi¹,

Kamaraju²

2022

Preprint

View full text Add to dashboard Cite

show abstract

“…• FinFET-7T SRAM cell: The representation of 7T-FinFET SRAM cell is mentioned in Figure 6. The 7T (7Transistor) cell design (Asli & Taghipour, 2017;Sneha et al, 2017) includes 2-CC inverters namely (XM3, XM4, XM5, and XM6) with an additional transistor (XM7) that is linked to the WL. Also, dual access transistors (XM1, XM2) are attached with the BL and BLB respectively.…”

Section: Finfet Based Sram Cellsmentioning

confidence: 99%

“…Table 4 represents the comparative performance of 6T SRAM in Planar and FinFET technology (Kumar & Chalil, 2019) in Hspice. Table 5 denotes the comparison of 7T with other SRAM cells (Sneha et al, 2017) and the simulation tool used is Tanner. The Table 6 indicates the comparative analysis of 7T SRAM (Garg & Singh, 2016) in H-spice tool.…”

Section: Analysis Of Sram Finfets Using Various Technologiesmentioning

confidence: 99%

A Review on SRAM Memory Design Using FinFET Technology

Lakshmi¹,

Kamaraju²

2022

International Journal of System Dynamics Applications

View full text Add to dashboard Cite

An innovative technology named FinFET (Fin Field Effect Transistor) has been developed to offer better transistor circuit design and to compensate the necessity of superior storage system (SS). As gate loses control over the channel, CMOS devices faces some major issues like increase in manufacturing cost, less reliability and yield, increase of ON current, short channel effects (SCEs), increase in leakage currents etc. However, it is necessary for the memory to have less power dissipation, short access time and low leakage current. The traditional design of SRAM (Static RAM) using CMOS technology represents severe performance degradation due to its higher power dissipation and leakage current. Thus, a Nano-scaled device named FinFET is introduced for designing SRAM since it has three dimensional design of the gate. FinFET has been used to improve the overall performance and has been chosen as a transistor of choice because it is not affected by SCEs. In this work, we have reviewed various FinFET based SRAM cells, performance metrics and the comparison over different technologies.

show abstract

FinFET: A Beginning of Non-planar Transistor Era

Kajal

Sharma

2020

Energy Systems in Electrical Engineering

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Design of 7T FinFET based SRAM cell design for nanometer regime

Cited by 10 publications

References 12 publications

A Review On Sram Memory Design Using Finfet Technology

A Review On Sram Memory Design Using Finfet Technology

A Review on SRAM Memory Design Using FinFET Technology

FinFET: A Beginning of Non-planar Transistor Era

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