Design of a Wideband High-Voltage High-Efficiency BiCMOS Envelope Amplifier for Micro-Base-Station RF Power Amplifiers

Kwak, Myoungbo; Kimball, D.; Presti, C.D.; Scuderi, A.; Santagati, C.; Yan, Jonmei J.; Asbeck, P.M.; Larson, L.E.

doi:10.1109/tmtt.2012.2184128

Cited by 22 publications

(12 citation statements)

References 17 publications

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“…The micro base station device is concentrated in a relatively small box, which can be easily installed. Micro base station can be installed nearby in the vicinity of the antenna, such as the top of the tower and roof directly using the jumper transmitted signals connected to the antenna terminal, which need shorter feeder cable and less signal consumption [4] [5].…”

Section: Power Communication Wireless Accessmentioning

confidence: 99%

The Power Communication Access Application of Radio Over PON

Yu¹,

Zhang²

2015

Proceedings of the 4th International Conference on Information Technology and Management Innovation

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Abstract. This paper describes the demand of wireless communication technology from the perspective of development trend of electric power communication construction. And then this paper describes the advantages and disadvantages of micro base station and macro base station. At last, this paper put forward the communication access method on radio over PON, which is based on the Ethernet passive optical network technology and wireless communication technology. The technology of Radio-over-PON reasonably balance the the communication efficiency, flexibility and security of the power communication access network.

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Section: Power Communication Wireless Accessmentioning

confidence: 99%

The Power Communication Access Application of Radio Over PON

Yu¹,

Zhang²

2015

Proceedings of the 4th International Conference on Information Technology and Management Innovation

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“…The envelope modulator must be designed for high efficiency, wide bandwidth, and with the capability of driving a varying PA load. Compared with the discrete solutions in [7], [11], the monolithic implementation of the envelope modulator has several benefits: 1) it can reduce cost; 2) it can have an integrated signal path providing better signal integrity, and 3) the transistors can be optimized more freely according to different power levels for better performances [15]. In this section, a monolithic envelope modulator will be reported, designed in a 0.35 m proprietary 40 V BCD technology developed by Texas Instruments (TI).…”

Section: High Voltage Envelope Modulator Designmentioning

confidence: 99%

“…Recent literature has demonstrated excellent overall efficiency using either EER [3]- [5] or ET [6]- [15]. In addition, several envelope shaping methods are proposed to improve the efficiency and linearity for ET-PAs, such as the sweet spot tracking reported in [8].…”

Section: Introductionmentioning

confidence: 99%

“…For example, in [4] a linear-assisted switching modulator with a large bandwidth of 285 MHz was proposed to work satisfactorily in an EER-PA for a 20 MHz signal. The bandwidth requirement is relatively relaxed for the ET-PA system [7], [12], [15], but it is still crucial to perform careful system analysis and optimization for the best overall efficiency and linearity, such as a judicial selection of the average switching frequency, applying necessary envelope shaping, and delivering the current handling capability to drive a small PA load for high . As different from previous publications in [4], [11], [15], this work emphasizes the impacts on the linearity of our cascode SiGe PA, when selecting the average switching frequency and the optimal envelope shaping.…”

Section: Introductionmentioning

confidence: 99%

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Design of High Efficiency Monolithic Power Amplifier With Envelope-Tracking and Transistor Resizing for Broadband Wireless Applications

Lopez

Schecht

et al. 2012

IEEE J. Solid-State Circuits

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This paper presents the design insights for the implementation of a fully monolithic radio frequency (RF) power amplifier (PA) using both envelope-tracking (ET) and transistor resizing techniques for long-term evolution (LTE) applications. At the low output power region, some of the power cells in the PA can be disabled to further save power consumption, thus enhancing the efficiency from a traditional ET-PA. Our ET-PA system is first realized with a two-chip solution, consisting of a high voltage envelope modulator fabricated in a 0.35 m Bipolar-CMOS-DMOS (BCD) technology, and a differential cascode PA in a 0.35 m SiGe BiCMOS technology. This two-chip solution of the ET-PA is to showcase the effective efficiency enhancement of using the transistor resizing method. In the second design, a CMOS envelope modulator is integrated with the cascode PA on the same die in the 0.35 m SiGe BiCMOS technology. Some insights are demonstrated regarding the optimization of the envelope modulator specific to our cascode PA for LTE broadband signals, where the finite bandwidth and the switching frequency of the envelope modulator are considered for achieving the minimal error-vector magnitude (EVM) and spurious noise. The fully monolithic BiCMOS ET-PA reaches the maximum linear output power ( ) of 24 dBm and 23.4 dBm with overall power-added-efficiency (PAE) of 41% and 38% for the LTE 16QAM 5 MHz and 10 MHz signals at 1.9 GHz, respectively, without needing predistortion. At the low power mode of our ET-PA, an additional PAE enhancement of 4% is obtained at of 16-20 dBm by disabling some of the PA power cells. Our fully monolithic ET-PA satisfies the LTE 16QAM linearity specs with high efficiency. Index Terms-Bipolar-CMOS-DMOS (BCD), cascode power amplifier (PA), envelope modulator, envelope-tracking (ET), long-term evolution (LTE), low power mode, SiGe BiCMOS, transistor resizing.

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“…The CMOS power amplifier suffers from disadvantages such as low breakdown voltage and low output power. Even so, as a power amplifier is also indispensable in many other important applications such as radar system [4], base station [5], etc., researchers turned to SiGe power amplifier [6], since it not only is superior to CMOS power amplifier on frequency response and power gain, but also can be integrated well with CMOS technology while its speed and power performance have been comparable to GaAs technology. So the SiGe power amplifier has attracted much research interest in this field [7][8][9].…”

Section: Introductionmentioning

confidence: 99%

Design of 900 MHZ Sige Power Amplifier With Linearization Bias Circuit

Zhang¹,

Zhang²,

Fu³

et al. 2016

PIER C

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Abstract-A single stage 900 MHz power amplifier (PA) with linearization bias circuit is designed with HHNEC 0.5 µm BIS500G power SiGe BiCMOS process. It is implemented by single-ended common emitter structure as a class AB power amplifier. The adopted active bias circuit is originally explained by using two virtue current sources, so that the mechanism of the improvement of linearity can be described more clearly. Then the mechanism is applied to guide the design of a power amplifier with an active bias circuit, which shows better linearity than resistor biased power amplifier by simulation. Through further design and measurement, the fabricated single stage power amplifier exhibits output power 1 dB compression point (OP1 dB) of 18.9 dBm, with power added efficiency (PAE) of 26.75% and power gain of 20.9 dB under 3.3 V voltage supply.

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Design of a Wideband High-Voltage High-Efficiency BiCMOS Envelope Amplifier for Micro-Base-Station RF Power Amplifiers

Cited by 22 publications

References 17 publications

The Power Communication Access Application of Radio Over PON

The Power Communication Access Application of Radio Over PON

Design of High Efficiency Monolithic Power Amplifier With Envelope-Tracking and Transistor Resizing for Broadband Wireless Applications

Design of 900 MHZ Sige Power Amplifier With Linearization Bias Circuit

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