Design of an 80V-class high-side capable double-resurf JI L-IGBT

Fujii, Hiroki; Komatsu, Shinichi; Sato, Masaharu; Ichikawa, T.

doi:10.1109/ispsd.2011.5890868

Cited by 3 publications

(1 citation statement)

References 2 publications

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“…However, a key problem with the use of conductivity modulated devices in Junction-Isolated (JI) technology, such as the LIGBT, is the possibility of carriers being injected into the substrate, which can cause malfunction of associated logic and control circuits in a power IC [1]. Several techniques, floating BLN (N + buried layer) [2], buried hole diverter [3], P + collector connected to the outmost enclosing N + sinker [4], and an BLN layer is implanted into the EPI region [5] are used to alleviate the high substrate current. Multichannel LIGBTs (MC-LIGBT) have been previously demonstrated in the double epitaxial lower dielectric isolation [6].…”

Section: Introductionmentioning

confidence: 99%

Design and analysis of a double RESURF 700V LIGBT with quasi-vertical DMOSFET in junction isolation technology

Tsai

Gong

Chan

et al. 2014

2014 IEEE 26th International Symposium on Power Semiconductor Devices &Amp; IC's (ISPSD)

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This paper presents the analysis of the substrate leakage current to anode current ratio of the 700V n-type lateral IGBT with quasi-vertical DMOSFET (QVDMOS) fabricated with junction isolation technology. To improve the substrate leakage, a p-type buried layer (BLP) is inserted between the ntype drift region and the n-type buried layer (BLN). A junction isolated p-region, which is connected to the BLP layer, is used to separate the N+ anode and the P+ anode. The measurement results show that this structure successfully eliminated the substrate current as well as to ensure high breakdown voltage. Furthermore, due to the use of the quasi-VDMOS cathode cell, additional current path enables a reduction in the forward voltage drop.

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