Design of an LDO with capacitor multiplier

Jiang, Ying; Meng, Huang; Yang, Huang

doi:10.1088/1674-4926/31/7/075010

Cited by 3 publications

(2 citation statements)

References 3 publications

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“…z changes the overall gain roll-off back to -20 dB per decade. It can be seen from Equation (10) and Figure 3 that the location of the ! z tracks the location of the second dominant pole irrespective of how the load and output capacitor change.…”

Section: Parallel Feedback Compensationmentioning

confidence: 99%

A transient-enhanced NMOS low dropout voltage regulator with parallel feedback compensation

Wang

Tao

2016

J. Semicond.

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This paper presents a transient-enhanced NMOS low-dropout regulator (LDO) for portable applications with parallel feedback compensation. The parallel feedback structure adds a dynamic zero to get an adequate phase margin with a load current variation from 0 to 1 A. A class-AB error amplifier and a fast charging/discharging unit are adopted to enhance the transient performance. The proposed LDO has been implemented in a 0.35 μm BCD process. From experimental results, the regulator can operate with a minimum dropout voltage of 150 mV at a maximum 1 A load and IQ of 165 μA. Under the full range load current step, the voltage undershoot and overshoot of the proposed LDO are reduced to 38 mV and 27 mV respectively.

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Section: Parallel Feedback Compensationmentioning

confidence: 99%

A transient-enhanced NMOS low dropout voltage regulator with parallel feedback compensation

Wang

Tao

2016

J. Semicond.

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“…In [12,13], Troxel et al and Erickson et al provided a possibility to extend the operating current range up to 1 A, but they did not show adequate current noise spectral density characteristics, nor total root-mean-square (RMS) current noise. The similar concept to the presented two-stage current source is used to improve noise properties of the electronic circuits, where a powerful source is combined with an active low-power filtering stage in the form of voltage source and is called a capacitor multiplier [14][15][16][17]. Very interesting QCL laser current source with implementing an idea of a capacitor multiplier was presented by Taubman [18].…”

Section: Introductionmentioning

confidence: 99%

Ultra‐stable, low‐noise two‐stage current source concept for electronics and laser applications

Dudzik

2017

IET Circuits, Devices & Syst

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This study presents a two-stage current source concept which features low-current noise, excellent drift and stability for higher operating currents. Generally, it is much easier to obtain higher stability and lower-noise parameters for small operating currents rather than large ones. This fact was used within this concept, where a precise low-current source (the second stage) corrects the fluctuations of high-current one (the first stage). In details the theory of operation for setup, the noise-sources analysis and measurement results are presented. For a maximum operating current equals 1 A, the current noise density of 126 nA/√Hz (at f = 1 kHz), long-term stability of ±2.1 ppm and temperature coefficient equal 2.8 ppm/°C, were obtained, whereas the current noise below 1 nA/√Hz was obtained for lower operating currents. Presented circuit is inexpensive to construct, non-thermally stabilised and very small size (1 × 1.2 in 2). The obtained parameters are competitive to commercial current drivers designed for laser applications. The two-stage current source has been successfully implemented in a fully integrated diode-pumped solid-state lasers.

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Design of a CCM/DCM dual mode DC-DC Buck Converter with Capacitor Multiplier

Choi¹,

Song²

2016

Journal of the Korea Academia-Industrial cooperation Society

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This paper presents a step-down DC-DC buck converter with a CCM/DCM dual-mode function for the internal power stage of portable electronic device. The proposed converter that is operated with a high frequency of 1 ㎒ consists of a power stage and a control block. The power stage has a power MOS transistor, inductor, capacitor, and feedback resistors for the control loop. The control part has a pulse width modulation (PWM) block, error amplifier, ramp generator, and oscillator. In this paper, an external capacitor for compensation has been replaced with a multiplier equivalent CMOS circuit for area reduction of integrated circuits. In addition, the circuit includes protection block, such as over voltage protection (OVP), under voltage lock out (UVLO), and thermal shutdown (TSD) block. The proposed circuit was designed and verified using a 0.18 ㎛ CMOS process parameter by Cadence Spectra circuit design program. The SPICE simulation results showed a peak efficiency of 94.8 %, a ripple voltage of 3.29 mV ripple, and a 1.8 V output voltage with supply voltages ranging from 2.7 to 3.3 V.

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Design of an LDO with capacitor multiplier

Cited by 3 publications

References 3 publications

A transient-enhanced NMOS low dropout voltage regulator with parallel feedback compensation

A transient-enhanced NMOS low dropout voltage regulator with parallel feedback compensation

Ultra‐stable, low‐noise two‐stage current source concept for electronics and laser applications

Design of a CCM/DCM dual mode DC-DC Buck Converter with Capacitor Multiplier

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