Proceedings of the Great Lakes Symposium on VLSI 2012
DOI: 10.1145/2206781.2206799
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Design of an RNS reverse converter for a new five-moduli special set

Abstract: In this paper, we present a new residue number system (RNS) {2 n − 1, 2 n , 2 n + 1, 2 n+1 + 1, 2 n−1 + 1} of five wellbalanced moduli that are co-prime for odd n. This new RNS complements the 5-moduli RNS system proposed before for even n {2 n − 1, 2 n , 2 n + 1, 2 n+1 − 1, 2 n−1 − 1}. With the new set, we also present a novel approach to designing multimoduli reverse converters that focuses strongly on moving a significant amount of computations off the critical path. The synthesis of the resulting design ov… Show more

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Cited by 8 publications
(25 citation statements)
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“…In this section, we will evaluate and compare the gate-level complexity of our converters and their closest counterparts: {2 n , 2 n − 1, 2 n + 1, 2 n+1 − 1, 2 n−1 − 1} (n even), proposed in [4] (special case of our moduli set with k = n), and {2 n − 1, 2 n , 2 n + 1, 2 n+1 + 1, 2 n−1 + 1} (n odd), proposed in [18]. The gate-level complexity evaluations of hardware and delay appear in Tables 1, 2 and 3.…”
Section: Gate-level Complexity Evaluationmentioning
confidence: 99%
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“…In this section, we will evaluate and compare the gate-level complexity of our converters and their closest counterparts: {2 n , 2 n − 1, 2 n + 1, 2 n+1 − 1, 2 n−1 − 1} (n even), proposed in [4] (special case of our moduli set with k = n), and {2 n − 1, 2 n , 2 n + 1, 2 n+1 + 1, 2 n−1 + 1} (n odd), proposed in [18]. The gate-level complexity evaluations of hardware and delay appear in Tables 1, 2 and 3.…”
Section: Gate-level Complexity Evaluationmentioning
confidence: 99%
“…Thus, we first provide an analysis of higher-level representations like CSAs and CPAs, whereas detailed complexity characteristics expressed in terms of primitive gates will be presented subsequently in Table 3. Table 1 details all adders used in our converters and their counterparts of [4] and [18]. As for the number of CPAs, Version 1 of our converter allows us to spare one CPA mod 2 n+1 − 1, one CPA mod 2 n−1 − 1 and one 4n-bit ordinary CPA, whereas Version 2 of our converter requires the same number of CPAs as its counterpart of [4] (or CPAs mod 2 n±1 + 1 as its counterpart of [18]).…”
Section: Gate-level Complexity Evaluationmentioning
confidence: 99%
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