Design of new CMOS current mode min and max circuits for FLC chip applications

Abstract

Presented in this paper is design of the new CMOS circuits to implement Min and Max operators. This work is based on analog advantages such as low die area, high DC range and simplicity which are added to the fuzzy system advantages. For implementing this idea, new current mode circuits are proposed which based on Wilson current mirrors. We used the one of them (min circuit) in implementing inference part of the Fuzzy Logic Controller (FLC) chip to combine the antecedents (fuzzy currents) of fuzzifier circuit. The simulation results of min and max circuits with applicable in designing FLC chip(which consists of two inputs, four membership functions for each one, sixteen rules and one output which designed in an area less than 0.1 mm 2 )has been done in 0.35um CMOS standard technology using Hspice software. Prepared

New Current-Mode Integrated Ternary Min/Max Circuits without Constant Independent Current Sources

“…Figure 13 shows how the circuit CITMin/Max3 restores an incomplete input signal. This is the ability the fuzzy circuits like the ones presented in [10][11][12] do not have. As a result, they are not appropriate for any digital systems such as Ternary.…”

“…One of the major features of circuits in discrete systems is the ability of generating full-swing outputs in spite of non-full-swing input signals. Therefore, the employment of these fuzzy circuits [10][11][12] in digital systems is neither suitable nor practical.…”

“…New minimum and maximum circuits have been presented in [10][11][12] for fuzzy logic. They are based on linear addition and subtraction of input currents, and they benefit from design simplicity and low transistor-count.…”

A novel low voltage CMOS controllable fuzzy inference circuit

“…Using circuits of WTA circuit to obtain Max operation [6,11,18,21] and subtract from fixed value to obtain LTA and Min operation [4,6,18,19] loose the accuracy and DC range of input [5]. The analog subtraction causes loss of accuracy and limits the input current to the value of a fixed reference, moreover, it needs large number of MOS transistors, which increases the area and power consumption [24]. The proposed Min and Max circuit has the mixed signal inputs.…”