2010 27th International Conference on Microelectronics Proceedings 2010
DOI: 10.1109/miel.2010.5490481
|View full text |Cite
|
Sign up to set email alerts
|

Design of rad-hard SRAM cells: A comparative study

Abstract: Abstract-This paper presents the design of three static RAM cells, designed to be radiation hard. The memory cells are designed with three different approaches and layout styles. Three memory arrays, each of them made with a different cell, were designed and simulated to optimize the transistor sizes. The layout of the cells has been drawn, and parasitic elements were extracted to analyze their impact on circuit performance. Simulation results demonstrate that the three cells are functional in all worst case c… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
1
1
1
1

Citation Types

0
3
0
1

Year Published

2010
2010
2023
2023

Publication Types

Select...
4
2
1

Relationship

2
5

Authors

Journals

citations
Cited by 7 publications
(4 citation statements)
references
References 6 publications
0
3
0
1
Order By: Relevance
“…Compared to conventional layout design, ELTs and guard rings require a larger silicon area. Therefore, a higher level of radiati There are no sources in the current document.n tolerance can be achieved only at the expense of a larger area [15].…”
Section: Guard Ringsmentioning
confidence: 99%
See 1 more Smart Citation
“…Compared to conventional layout design, ELTs and guard rings require a larger silicon area. Therefore, a higher level of radiati There are no sources in the current document.n tolerance can be achieved only at the expense of a larger area [15].…”
Section: Guard Ringsmentioning
confidence: 99%
“…Another example is the "scrambling" in a memory array: the physical location of bits do not correspond to the logical bit position, to avoid logical Multiple Bit Upset (MBU) due to SEE. A further improvement can be obtained by storing each bit of a byte into a different memory array, and by providing each memory array with separate bit-line and word-line decoders, to avoid MBUs due to address upset [15].…”
Section: Architectural Solutionsmentioning
confidence: 99%
“…With this approach, the area of a single SRAM cell is 16.58 µm 2 . Other layout designs have been explored, that provide different trade-offs between area and radiation hardness [5]. This design employs the cell with the best radiation hardness performance.…”
Section: Sram Designmentioning
confidence: 99%
“…Além da preocupação em aumentar o desempenho elétrico dos MOSFETs, certas aplicações como as espaciais, nucleares e médicas requerem que eles sejam mais tolerantes às radiações ionizantes (Makowski, 2006). Existem diferentes formas para aumentar a tolerância às radiações ionizantes como, por exemplo, as técnicas de resistência à radiação por processo (radiation hardening by process RHBP) (Benigni, Liberali, Stabile, & Calligaro, 2010) e por projeto (radiation hardening by design RHBD) (Camplani, Shojaii, Shrimali, Stabile, & Liberali, 2014), onde as estruturas, os materiais e os leiautes dos MOSFETs, são alterados para atingir esses objetivos.…”
Section: Introductionunclassified