2008
DOI: 10.1109/tcsii.2007.906086
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Design Procedure for Settling Time Minimization in Three-Stage Nested-Miller Amplifiers

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Cited by 40 publications
(30 citation statements)
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“…There are several publications considering the optimization of settling performance in the design of multistage OTAs [7][8][9][10][11][12][13][14]. These publications have been aimed to improve the linear settling time by its optimization using systematic design methodologies.…”
Section: Introductionmentioning
confidence: 99%
“…There are several publications considering the optimization of settling performance in the design of multistage OTAs [7][8][9][10][11][12][13][14]. These publications have been aimed to improve the linear settling time by its optimization using systematic design methodologies.…”
Section: Introductionmentioning
confidence: 99%
“…Another contribution of this work is to include non-linear section of step response into the proposed analysis. This section plays a key role in value of total settling time and excluding it (similar to the majority of design methodologies already proposed [2][3][4][5][6][7]) might lead to unacceptable error.…”
Section: Introductionmentioning
confidence: 99%
“…In design and optimization of switched-capacitor circuits, a precise settling-based design methodology would be especially helpful [5,7,[19][20][21][22][23]. This has been formerly authenticated by the authors in [24] in which high-speed two-stage amplifiers have been considered.…”
Section: Introductionmentioning
confidence: 99%
“…Operational amplifiers used in switched-capacitor circuits are the best example of these systems. There are several techniques proposed in the literature for the design of these circuit blocks which take in account the adjustment of the settling time within a given boundary (see, for instance, [2][3][4][5]). …”
Section: Introductionmentioning
confidence: 99%