Desing and self-test for switched-current building blocks

A novel method based on a fault dictionary that uses entropy as a preprocessor to diagnose faulty behavior in switched current (SI) circuit is presented in the paper. The proposed method uses a data acquisition board to extract the original signal form the output terminals of the circuit-under-tests. These original data are fed to the preprocessors for feature extraction and finds out the entropies of the signals which are a quantitative measure of the information contained in the signals. The proposed method has the capability to detect and identify faulty transistors in SI circuit by analyzing its output signals with high accuracy. Using entropy of signals to preprocess the circuit response drastically reduces the size of fault dictionary, minimizing fault detect time and simplifying fault dictionary architecture. The result from our examples showed that entropies of the signals fall on different range when the faulty transistors ' Transconductance G m value varying within their tolerances of 5 or 10%, thus we can identify the faulty transistors correctly when the response do not overlap. The average accuracy of fault recognition achieved is more than 95% although there are some overlapping data when tolerance is considered. The method can classify not only parametric faults but also catastrophic faults. It is applicable to analog circuits as well as SI ones. A low-pass and a band-pass SI filter and a Clock feedthrough cancellation circuit have been used as test beached to verify the effectiveness of the proposed method. A comparison of our work with Yuan et al. (IEEE Trans Instrum Meas 59(3):586-595, 2010), which used entropy and kurtosis as preprocessors, reveals that our method requiring one feature parameter reduces the computation and fault diagnosis time.

Section: Entropymentioning

confidence: 98%

Section: Introductionmentioning

confidence: 99%

Fault dictionary based switched current circuit fault diagnosis using entropy as a preprocessor

Long

Liu

2010

“…The traditional analog circuit breakdown models include catastrophic faults(or hardware faults) and parametric faults (or soft faults, parameters of parts change beyond the scope of its safety margin, resulting in unacceptable performance recession). Relatively speaking, catastrophic failure testing is easier [5,6,10] than soft fault testing.…”

Section: Pseudo-random Test Theorymentioning

confidence: 99%

“…There are some literatures discussed testing on the switched current circuits including testing principles, processes, as well as BIST exists. The reported approaches can basically be divided into two categories: (1) Based on DC signal testing technology [2][3][4], they can test the changes of static characteristics in switching current circuit, which cased by MOS malfunctions, such as leakage current changes, export conductance, and voltage transmission characteristics and bias, but cannot test frequency dynamics and distortions characteristics; (2) Based on testing phase clock [5][6][7], by changing the clock sequence, divideby-two circuits are restructured into cascade connected current mirror circuit and then contrast the import and export current signal. The proposed techniques suffer from being applicable only to some specific structures.…”

Section: Introductionmentioning

confidence: 99%

Switched-current circuits test using pseudo-random method

Guo

Tang

et al. 2007

A built in Pseudo-Random sequence testing for testing embedded switched-current filters is described in this paper. The generation approach of Pseudo-Random sequence and the match for z functions of switched-current filters is analyzed and calculated. Taking into account of the connection between special structural problems and CMOS's parameters in switched current circuits such as the drain-gate capacitance C dg , gate-source capacitance C gs and transconductance g m. , a integrated fault model for testing is constituted. A 6-order switched-current low-pass filter has been tested based on catastrophic and parametric fault models. The technique does not intrude into the actual design of the switched-current blocks, Pseudo-Random sequence generated from existing digital hardware and analogue output pins are not required.

“…However, concerning the testing aspect, the test techniques proposed for analog circuits are not readily applicable to SI circuits. The few papers dedicated to the test of SI circuits principally concern test methodology, test generation, DFT, and BIST [1][2][3][4]. Recently, the concept of implicit functional testing was introduced in [5][6][7][8], these works used pseudorandom approach transferred digital test technology to the analog test, for detection and localization of parametric faults in analog circuits by evaluating different circuit responses.…”

Section: Introductionmentioning

confidence: 99%

Implicit functional testing of switched current filter based on fault signatures

Long

Liu

et al. 2011

This article aims at defining an efficient test strategy for switched-current (SI) circuit testing. By checking the constructed signatures (impulse response samples) against the derived tolerance ranges, we can infer the correctness of the device under test without explicitly measuring the original performance parameters. We also describe a technique of mapping the tolerance ranges in the performance space to its associated tolerance ranges in the signature space (We call such a procedure implicit functional testing). Taking into account the specificity of SI circuit, catastrophic and parametric fault model for testing are constructed. A fifth order Butterworth low-pass filter and a sixth order Elliptic band-pass filter have been used as test benches to assess the effectiveness of the proposed technique. Test results demonstrate that high fault coverage can be achieved with low cost test equipments.