Development of Low Power Cryogenic Readout Integrated Circuits Using Fully-Depleted-Silicon-on-Insulator CMOS Technology for Far-Infrared Image Sensors

Wada, Takehiko; Nagata, Hajime; Ikeda, Hirokazu; Arai, Y.; Ohno, Morifumi; Nagase, Koichi

doi:10.1007/s10909-012-0461-6

Cited by 27 publications

(12 citation statements)

References 14 publications

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“…We fabricated CMOS OPAMP and confirmed superior performance compared with that of PMOS OPAMP [17][18][19], and have successfully demonstrated a capacitive transimpedance amplifier (CTIA) at 4.2 K with 1 µW power consumption. We measured the off-leakage current of an NMOS FET reset switch with a gate width/length ratio (W/L) of W/L = 5 µm/10 µm at 4.2 K and that was less than 1.5 × 10 −16 A with |V DS | ∼ 1 V [18].…”

Section: Development Of Fd-soi Cmos Roicmentioning

confidence: 90%

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Development for Germanium Blocked Impurity Band Far-Infrared Image Sensors with Fully-Depleted Silicon-On-Insulator CMOS Readout Integrated Circuit

et al. 2016

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We are developing far-infrared (FIR) imaging sensors for low-background and high-sensitivity applications such as infrared astronomy. Previous FIR monolithic imaging sensors, such as an extrinsic germanium photo-conductor (Ge PC) with a PMOS readout integrated circuit (ROIC) hybridized by indium pixel-to-pixel interconnection, had three difficulties: (1) short cut-off wavelength (120 µm), (2) large power consumption (10 µW/pixel), and (3) large mismatch in thermal expansion between the Ge PC and the Si ROIC. In order to overcome these difficulties, we developed (1) a blocked impurity band detector fabricated by a surface-activated bond technology, whose cut-off wavelength is longer than 160 µm, (2) a fully-depleted silicon-on-insulator CMOS ROIC which works below 4 K with 1 µW/pixel operating power, and (3) a new concept, Si-supported Ge detector, which shows tolerance to 123 218 J Low Temp Phys (2016) 184:217-224 thermal cycling down to 3 K. With these new techniques, we are now developing a 32 × 32 FIR imaging sensor.

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Section: Development Of Fd-soi Cmos Roicmentioning

confidence: 90%

“…We measured the off-leakage current of an NMOS FET reset switch with a gate width/length ratio (W/L) of W/L = 5 µm/10 µm at 4.2 K and that was less than 1.5 × 10 −16 A with |V DS | ∼ 1 V [18]. We also fabricated CMOS analog switches which were designed to be used for the row and column selectors [20].…”

Section: Development Of Fd-soi Cmos Roicmentioning

confidence: 99%

Development for Germanium Blocked Impurity Band Far-Infrared Image Sensors with Fully-Depleted Silicon-On-Insulator CMOS Readout Integrated Circuit

et al. 2016

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“…We have developed transparent electrodes which have a high FIR transmittance and a high-quality ohmic contact [8]. We have also developed the ROIC operable at cryogenic temperatures [9,10] and successfully demonstrated a trans-impedance amplifier at 4.2 K [11]. Development of a large-format FIR imaging sensor based on the SAB Ge junction device is underway [12].…”

Section: Future Workmentioning

confidence: 99%

Development of Blocked-Impurity-Band-Type Ge Detectors Fabricated with the Surface-Activated Wafer Bonding Method for Far-Infrared Astronomy

et al. 2016

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We report the current status of the development of our new detectors for far-infrared (FIR) astronomy. We develop Blocked-Impurity-Band (BIB)-type Ge detectors to realize large-format compact arrays covering a wide FIR wavelength range up to 200 µm. We fabricated Ge junction devices of different physical parameters with a BIB-type structure, using the room temperature, surface-activated wafer bonding (SAB) method. We measured the absolute responsivity and the spectral response curve of each device at low temperatures, using an internal blackbody source in a cryostat and a Fourier transform spectrometer, respectively. The results show that the SAB Ge junction devices have significantly higher absolute responsivities and longer cut-off wavelengths of the spectral response than the conventional bulk Ge:Ga device. Based upon the results, we discuss the optimum parameters of SAB Ge junction devices for FIR detectors. We conclude that SAB Ge junction devices possess a promising applicability to next-generation FIR detectors covering wavelengths up to ∼200 µm with high responsivity. As a next step, we plan to fabricate a BIB-type Ge array device in combination with a low-power cryogenic readout integrated circuit.

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“…The Silicon-On-Insulator (SOI) amplifier is a candidate for readout of the Nb/Al-STJ. It has been reported to operate at 4K by a JAXA/KEK group [6]. The large scale integration (LSI) on SiO 2 insulator has been developed with the SOI technology.…”

Section: Pos(tipp2014)074mentioning

confidence: 99%

Development of Superconducting Tunnel Junction Photon Detector on SOI Preamplifier Board to Search for Radiative decays of Cosmic Background Neutrino.

Kasahara¹,

Kim²,

Takeuchi³

et al. 2015

Proceedings of Technology and Instrumentation in Particle Physics 2014 — PoS(TIPP2014)

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We present a development of a novel photon detector based on superconducting tunnel junction (STJ) and silicon-on-Insulator (SOI) technology for application to an experiment to search for radiative decays of cosmic background neutrinos using photon energy spectrum in the cosmic infrared background region. The requirement of the detector for the experiment is a capability of photon-by-photon detection in the far-infrared region. In principle, a Nb/Al-STJ is expected to be able to detect a single far-infrared photon, however, it has not succeeded yet even with the STJ since the signal from the single far-infrared photon is much smaller than the readout noise level currently achieved. To solve this problem, we employ a preamplifier that can be operated at a cryogenic temperature below 1K to improve the signal-to-noise ratio in STJ readout signal. SOI preamplifier is a promising candidate as it was reproved to function at 4K by a JAXA and KEK group. We process a STJ directly on the SOI wafer with the preamplifier circuit to make the detector simple and compact. First we tested a STJ on a SOI board only with SOI-MOSFETs to verify the electrical contact between the STJ and the SOIFET electrodes as well as the STJ being processed without causing any damage on SOI-FET. We have confirmed that the SOI-FET shows an excellent performance below 1K and the STJ on the SOI can operate normally. Then we designed a more practical version of the SOI-STJ photon detector with a preamplifier circuit in the SOI wafer.

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Development of Low Power Cryogenic Readout Integrated Circuits Using Fully-Depleted-Silicon-on-Insulator CMOS Technology for Far-Infrared Image Sensors

Cited by 27 publications

References 14 publications

Development for Germanium Blocked Impurity Band Far-Infrared Image Sensors with Fully-Depleted Silicon-On-Insulator CMOS Readout Integrated Circuit

Development for Germanium Blocked Impurity Band Far-Infrared Image Sensors with Fully-Depleted Silicon-On-Insulator CMOS Readout Integrated Circuit

Development of Blocked-Impurity-Band-Type Ge Detectors Fabricated with the Surface-Activated Wafer Bonding Method for Far-Infrared Astronomy

Development of Superconducting Tunnel Junction Photon Detector on SOI Preamplifier Board to Search for Radiative decays of Cosmic Background Neutrino.

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