Device reliability for CMOS image sensors with backside through-silicon vias

Gambino, Jeff; Soleimani, H. Rahimpour; Rahim, Inzarulfaisham Abd; Riebeek, B.; Sheng, Lieyi; Hosey, George P.; Truong, Hoa D.; Hall, Gavin D.R.; Jerome, R.; Price, D.

doi:10.1109/irps.2018.8353611

Cited by 7 publications

(3 citation statements)

References 11 publications

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“…Additionally, the passivation effect of interface states upon H sintering treatment in the BSI process may be less than that in the FSI process [ 50 , 51 , 52 ]. Vici et al also reported that interface state defects are created by BSI processes such as wafer bonding and thinning [ 53 ].…”

Section: Resultsmentioning

confidence: 99%

Reduction of Dark Current in CMOS Image Sensor Pixels Using Hydrocarbon-Molecular-Ion-Implanted Double Epitaxial Si Wafers

Onaka‐Masada

Kadono

Okuyama

et al. 2020

Sensors

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The impact of hydrocarbon-molecular (C3H6)-ion implantation in an epitaxial layer, which has low oxygen concentration, on the dark characteristics of complementary metal-oxide-semiconductor (CMOS) image sensor pixels was investigated by dark current spectroscopy. It was demonstrated that white spot defects of CMOS image sensor pixels when using a double epitaxial silicon wafer with C3H6-ion implanted in the first epitaxial layer were 40% lower than that when using an epitaxial silicon wafer with C3H6-ion implanted in the Czochralski-grown silicon substrate. This considerable reduction in white spot defects on the C3H6-ion-implanted double epitaxial silicon wafer may be due to the high gettering capability for metallic contamination during the device fabrication process and the suppression effects of oxygen diffusion into the device active layer. In addition, the defects with low internal oxygen concentration were observed in the C3H6-ion-implanted region of the double epitaxial silicon wafer after the device fabrication process. We found that the formation of defects with low internal oxygen concentration is a phenomenon specific to the C3H6-ion-implanted double epitaxial wafer. This finding suggests that the oxygen concentration in the defects being low is a factor in the high gettering capability for metallic impurities, and those defects are considered to directly contribute to the reduction in white spot defects in CMOS image sensor pixels.

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Section: Resultsmentioning

confidence: 99%

Reduction of Dark Current in CMOS Image Sensor Pixels Using Hydrocarbon-Molecular-Ion-Implanted Double Epitaxial Si Wafers

Onaka‐Masada

Kadono

Okuyama

et al. 2020

Sensors

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“…some practical tricks have been proposed to overcome the problem of the BSI reliability degradation. As an example, a backside process engineering was proposed, which allows effective repassivation during the final hydrogen anneal covering the backside of the wafer with a SiN layer acting as hydrogen diffusion barrier [9]. Another approach consists in opening in the back-side of the wafer a suitable pattern of deep-trenches that, passing through the passivation layers and the silicon substrate, land on the inter-level metal dielectrics.…”

Section: Introductionmentioning

confidence: 99%

Performance and Reliability Degradation of CMOS Image Sensors in Back-Side Illuminated Configuration

Vici

Russo²,

Lovisi³

et al. 2020

IEEE J. Electron Devices Soc.

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We present a systematic characterization of wafer-level reliability dedicated test structures in BackSide Illuminated CMOS Image Sensors. Noise and electrical measurements performed at different steps of the fabrication process flow, definitely demonstrate that the wafer flipping/bonding/thinning and VIA opening proper of the BackSide Illuminated configuration cause the creation of oxide donor-like border traps. Respect to conventional Front-Side-Illuminated CMOS Image Sensors, the presence of these traps causes degradation of the transistors electrical performance, altering the oxide electric field and shifting the flat-band voltage, and strongly degrades also reliability. Results from Time-Dependent Dielectric Breakdown and Negative Bias Temperature Instability measurements outline the impact of those border traps on the lifetime prediction. Index Terms-Backside CMOS Image Sensors, gate oxide traps, performance and reliability degradation, noise and charge pumping measurements, lifetime prediction.

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“…Unfortunately, despite the optical improvement, the BSI configuration exhibits several drawbacks from electrical and reliability points of view [1], [13], [14]. Some studies have been carried out to understand the reason for this degradation [15]- [17], but the debate is still going on and further research must be done. In recent studies, we demonstrated that, with respect to FSI, BSI-CIS gate oxides contain an additional distribution of donor-like traps [18], [19].…”

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confidence: 99%

On Border Traps in Back-Side-Illuminated CMOS Image Sensor Oxides

Vici

Russo²,

Lovisi³

et al. 2020

IEEE Trans. Electron Devices

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CMOS image sensors (CISs) in back-sideilluminated configuration consist of photodiode arrays having metal lines and drive electronics beneath the active region with respect to the device/air interface so that the light reaches the photodiode active region directly. This enhances sensor quantum efficiency but reduces the electrical performance and reliability. The backside configuration is realized by flipping the wafer upside down, bonding it to a handling wafer, mechanically thinning it, and opening a through-silicon via with a long plasma etch. As a result, gate oxides in backside CISs show an increased density of donor-like border traps with respect to the conventional front-side-illuminated sensors. In this article, we try to add some information toward the comprehension of the origin and the electrical nature of those traps in backside gate oxides. To this aim, we performed negative bias temperature instability stress on p-channel MOSFETs during which the traps were filled by holes tunneling from the substrate and then studied the relaxation transients of the drain current after the stress was removed. The characteristic emission times of a few specific levels were obtained at different temperatures. This allowed us to extract values of the trap activation energies, which resulted coherent with hole-capturing E donor-like centers (trivalent silicon dangling bonds) commonly attributed to ionizing radiation. Index Terms-Backside illuminated (BSI) CMOS image sensors (CISs), gate oxide border traps, TDDS. I. INTRODUCTION A CMOS image sensor (CIS) is an array of light-sensitive pixels. Each pixel consists of a photo-diode (PD) and several control MOSFETs. In the front-side-illuminated (FSI) configuration [Fig. 1(a)], the light reaches the PD active region through the microlenses, the filters, the passivation layers, the metal lines, and the interdielectric layers [1], [2]. So, the Manuscript

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Device reliability for CMOS image sensors with backside through-silicon vias

Cited by 7 publications

References 11 publications

Reduction of Dark Current in CMOS Image Sensor Pixels Using Hydrocarbon-Molecular-Ion-Implanted Double Epitaxial Si Wafers

Reduction of Dark Current in CMOS Image Sensor Pixels Using Hydrocarbon-Molecular-Ion-Implanted Double Epitaxial Si Wafers

Performance and Reliability Degradation of CMOS Image Sensors in Back-Side Illuminated Configuration

On Border Traps in Back-Side-Illuminated CMOS Image Sensor Oxides

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