Diagnose compound scan chain and system logic defects

Diagnosis of Multiple Scan-Chain Faults in the Presence of System Logic Defects

“…After the flush test, a SA-fault can be narrowed down to two symmetric nodes (one in the top part and the other in the bottom part) or one node (in the middle part); a missing-edge fault can be narrowed down to some symmetric parts (for example part (2,4,5,8) or (3,6,7,9) in Fig.1); a missing-clock fault can be narrowed down to one candidate, but we cannot distinguish it from the SA-fault in the same position. Therefore, we first give the scheme to distinguish two SA-faults in the symmetric nodes and the missing-clock fault in the top part.…”

“…1 as an example, if nodes (2,4,5,8) or (3,6,7,9) are inaccessible, only the first 6 bits during the unloading process for a pattern are captured response bits, while the other four bits are error bits. Based on the values of the 6 observed response bits, we can determine which part (nodes (2,4,5,8) or (3,6,7,9)) is inaccessible. Therefore, for a DTS with inaccessible candidate parts, P1 and P2, we first calculate the expected response of P1 and P2 for each pattern.…”

“…In the new flush pattern, we load (0, 0, 1, 1) into scan cells (8,4,5,2) and arbitrary values into other scan cells.…”

“…Many early scan chain diagnosis methods make the unrealistic assumption that the system logic is fault-free [14]. The diagnosis process is considerably more challenging for a compound fault model in which system logic faults can co-occur with scan chain faults and can corrupt the test results obtained in the absence of system logic faults [2,3,6,16]. Prior studies that allow compound faults in scan chain diagnosis, however, are limited to solutions that solve specific cases or can tolerate only a small number of logic defects for perfect diagnosis.…”

“…Software-based methods algorithmically analyze the test data for diagnosis. These can be further broken down into two broad sub-categories: (1) simulation based in which available test patterns are fault simulated and analyzed [2,4,12], and (2) deterministic diagnostic pattern generation (DDPG) based which target individual scan cells on a faulty scan chain for test generation [13,15].…”