Digital phase-locked loop constructed by AND-filter

Abstract

We propose a new type of DPLL with AND-filter[4] instead of RWF, for the purpose of having the faster phase acquisition speed. We compare this proposed loop with the conventional loops[3] [4]. It is found that the phase acquisition speed of this proposed loop is better than that of either the loop[3] or the loop[4] with same noise suppression effect. These performance is verified by computer simulation.

Digital phase‐locked loops with a wide locking range using a fractional divider

“…To overcome these problems, various types of DPLLs have been proposed; these include the multilevel quantized DPLL [ 6 ] , the systems combining the phase control and the frequency control [7, 81, and the system using an AND filter as a loop filter [ 9 ] . Although the systems indeed have expanded the locking ranges or have increased the speed of acquisition, there have been problems.…”