DiplodocusDF, a Domain-Specific Modelling Language for Software Defined Radio Applications

Gonzalez-Pina, Jair; Ameur-Boulifa, Rabéa; Pacalet, Renaud

doi:10.1109/seaa.2012.36

Cited by 5 publications

(5 citation statements)

References 19 publications

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“…On the other hand, many integrated design environments (IDEs) are emerging, targeting general-purpose applications on parallel architectures or dedicated to SDR. Among these design tools, one can mention OSSIE [Gonzalez et al 2009] (implementing SCA), SPEX [Lin et al 2006], or DiplodocusDF [Gonzalez-Pina et al 2012] (see Dardaillon et al [2013] for a complete survey).…”

Section: Related Workmentioning

confidence: 99%

A New Compilation Flow for Software-Defined Radio Applications on Heterogeneous MPSoCs

Dardaillon

Marquet

Risset

et al. 2016

ACM Trans. Archit. Code Optim.

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International audienceThe advent of portable software-defined radio (SDR) technology is tightly linked to the resolution of a difficult problem: efficient compilation of signal processing applications on embedded computing devices. Modern wireless communication protocols use packet processing rather than infinite stream processing and also introduce dependencies between data value and computation behavior leading to dynamic dataflow behavior. Recently, parametric dataflow has been proposed to support dynamicity while maintaining the high level of analyzability needed for efficient real-life implementations of signal processing computations. This article presents a new compilation flow that is able to compile parametric dataflow graphs. Built on the LLVM compiler infrastructure, the compiler offers an actor-based C++ programming model to describe parametric graphs, a compilation front end for graph analysis, and a back end that currently matches the Magali platform: a prototype heterogeneous MPSoC dedicated to LTE-Advanced. We also introduce an innovative scheduling technique, called microscheduling, allowing one to adapt the mapping of parametric dataflow programs to the specificities of the different possible MPSoCs targeted. A specific focus on FIFO sizing on the target architecture is presented. The experimental results show compilation of 3GPP LTE-Advanced demodulation on Magali with tight memory size constraints. The compiled programs achieve performance similar to handwritten code. This work was sponsored by Région Rhône Alpes ADR 11 01302401. Part of this work was published as M. Dardaillon, K. Marquet, T. Risset, J. Martin, and H.-P. Charles. 2014. A compilation flow for parametric dataflow: Programming model, scheduling, and application to heterogeneous MPSoC. " In Proceedings of the International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES'14). This work extends the previous publication by providing a thorough presentation of a new front end technique, introducing a new Promela model for buffer size verification, and updated results reflecting the subtantial improvements provided by the new Promela model

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Section: Related Workmentioning

confidence: 99%

A New Compilation Flow for Software-Defined Radio Applications on Heterogeneous MPSoCs

Dardaillon

Marquet

Risset

et al. 2016

ACM Trans. Archit. Code Optim.

View full text Add to dashboard Cite

show abstract

“…Therefore, several proposals attempted to meet those requirements by using software-based approaches [8][9][10][11][12][13][14]. Indeed, software gives an abstraction level that enables more control over the hardware design flow.…”

Section: Software-defined Radio Languages and Middlewaresmentioning

confidence: 99%

“…Most of these languages proposed in the literature essentially target DSP-centric architectures through specific design flows [8][9][10]. The waveform description language (WDL) [8] enables implementing the overall PHY from a hierarchical decomposition.…”

Section: Software-defined Radio Languages and Middlewaresmentioning

confidence: 99%

“…It is declined into three sub-languages, namely the Kernel SPEX defining the processing algorithm, the Stream SPEX handling the dataflow and modules interconnections, and finally the Synchronous SPEX for real-time constraints consideration. DiplodocusDF [10] is a modeling language that was proposed for implementing SDR PHYs on softwarebased platforms. It leverages a unified modeling language (UML)-like representation to model the SDR PHY and generates an executable to run on a software-based platform.…”

Section: Software-defined Radio Languages and Middlewaresmentioning

confidence: 99%

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A frame-based domain-specific language for rapid prototyping of FPGA-based software-defined radios

Ouedraogo

Gautier

Sentieys

2014

EURASIP J. Adv. Signal Process.

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The field-programmable gate array (FPGA) technology is expected to play a key role in the development of software-defined radio (SDR) platforms. As this technology evolves, low-level designing methods for prototyping FPGA-based applications did not change throughout the decades. In the outstanding context of SDR, it is important to rapidly implement new waveforms to fulfill such a stringent flexibility paradigm. At the current time, different proposals have defined, through software-based approaches, some efficient methods to prototype SDR waveforms in a processor-based running environment. This paper describes a novel design flow for FPGA-based SDR applications. This flow relies upon high-level synthesis (HLS) principles and leverages the nascent HLS tools. Its entry point is a domain-specific language (DSL) which handles the complexity of programming an FPGA and integrates some SDR features so as to enable automatic waveform control generation from a data frame model. Two waveforms (IEEE 802.15.4 and IEEE 802.11a) have been designed and explored via this new methodology, and the results are highlighted in this paper.

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“…On the other hand, many Integrated Design Environments (IDEs) are emerging, targeting general purpose applications on parallel architectures or dedicated to software defined radio. Among these design tools, one can mention OSSIE [18] (implementing SCA), SPEX [26] or DiplodocusDF [19] (see [14] for a complete survey).…”

Section: Related Workmentioning

confidence: 99%

A compilation flow for parametric dataflow

Dardaillon

Marquet

Risset

et al. 2014

Proceedings of the 2014 International Conference on Compilers, Architecture and Synthesis for Embedded Systems

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Efficient programming of signal processing applications on embedded systems is a complex problem. High level models such as Synchronous dataflow (SDF) have been privileged candidates for dealing with this complexity. These models permit to express inherent application parallelism, as well as analysis for both verification and optimization. Parametric dataflow models aim at providing sufficient dynamicity to model new applications, while at the same time maintaining the high level of analyzability needed for efficient real life implementations. This paper presents a new compilation flow that targets parametric dataflows. Built on the LLVM compiler infrastructure, it offers an actor based C++ programming model to describe parametric graphs, a compilation front-end providing graph analysis features, and a retargetable back-end to map the application on real hardware. This paper gives an overview of this flow, with a specific focus on scheduling. The crucial gap between dataflow models and real hardware on which actor firing is not atomic, as well as the consequences on FIFOs sizing and execution pipelining are taken into account.The experimental results illustrate our compilation flow applied to compilation of 3GPP LTE-Advanced demodulation on a heterogeneous MPSoC with distributed scheduling features. This achieves performances similar to time-consuming hand made optimizations.

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DiplodocusDF, a Domain-Specific Modelling Language for Software Defined Radio Applications

Cited by 5 publications

References 19 publications

A New Compilation Flow for Software-Defined Radio Applications on Heterogeneous MPSoCs

A New Compilation Flow for Software-Defined Radio Applications on Heterogeneous MPSoCs

A frame-based domain-specific language for rapid prototyping of FPGA-based software-defined radios

A compilation flow for parametric dataflow

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