Domain Wall Magnets for Embedded Memory and Hardware Security

Iyengar, Anirudh; Ghosh, Swaroop; Ramclam, Kenneth

doi:10.1109/jetcas.2015.2398232

Cited by 20 publications

(7 citation statements)

References 20 publications

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“…In [156,166], the authors advocate the process variations for nanowire manufacturing in domain-wall memories for PUFs. In [167], the authors leverage the inherently stochastic spin switching mechanism in nanomagnets for TRNGs.…”

Section: Emerging Devicesmentioning

confidence: 99%

Hardware Security For and Beyond CMOS Technology

Knechtel¹

2020

Proceedings of the 2020 International Symposium on Physical Design

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As with most aspects of electronic systems and integrated circuits, hardware security has traditionally evolved around the dominant CMOS technology. However, with the rise of various emerging technologies, whose main purpose is to overcome the fundamental limitations for scaling and power consumption of CMOS technology, unique opportunities arise also to advance the notion of hardware security. In this paper, I first provide an overview on hardware security in general. Next, I review selected emerging technologies, namely (i) spintronics, (ii) memristors, (iii) carbon nanotubes and related transistors, (iv) nanowires and related transistors, and (v) 3D and 2.5D integration. I then discuss their application to advance hardware security and also outline related challenges. CCS CONCEPTS• Security and privacy → Security in hardware; • Hardware → Emerging technologies.

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Section: Emerging Devicesmentioning

confidence: 99%

Hardware Security For and Beyond CMOS Technology

Knechtel¹

2020

Proceedings of the 2020 International Symposium on Physical Design

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“…Traditional CMOS-based camouflaging implementations incur overheads in circuit area, power, and delay. Recent explorations have investigated emerging devices such as spin-transfer-torque devices 11 , tunnel-FETs 12 , ferroelectric devices 13 , 14 , tungsten diselenide (WSe 2 ) devices 15 , etc., for provisioning hardware security by leveraging unique properties such as their non-volatile behavior. Rajendran et al 16 proposed a gate camouflaging technique by inserting dummy via/contacts in the layout and creating look-alike layouts for NAND, NOR, and XNOR cells (Fig.…”

Section: Introductionmentioning

confidence: 99%

Hardware functional obfuscation with ferroelectric active interconnects

Deng

et al. 2022

Nat Commun

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Existing circuit camouflaging techniques to prevent reverse engineering increase circuit-complexity with significant area, energy, and delay penalty. In this paper, we propose an efficient hardware encryption technique with minimal complexity and overheads based on ferroelectric field-effect transistor (FeFET) active interconnects. By utilizing the threshold voltage programmability of the FeFETs, run-time reconfigurable inverter-buffer logic, utilizing two FeFETs and an inverter, is enabled. Judicious placement of the proposed logic makes it act as a hardware encryption key and enable encoding and decoding of the functional output without affecting the critical path timing delay. Additionally, a peripheral programming scheme for reconfigurable logic by reusing the existing scan chain logic is proposed, obviating the need for specialized programming logic and circuitry for keybit distribution. Our analysis shows an average encryption probability of 97.43% with an increase of 2.24%/ 3.67% delay for the most critical path/ sum of 100 critical paths delay for ISCAS85 benchmarks.

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“…Several studies on hardware-oriented security applications have demonstrated the robustness of functional systems based on nano-electronic technology and their preliminary security capabilities, i.e. memristors [5]- [7], spin-torque devices [8], [9], phase change materials [10], [11], silicon nanowires [12], [13], and etc.. The memristor, as one promising candidate among nano-electronic devices, have the potential to construct innovative computing systems with nanoscale miniaturization [14], [15] and lowpower consumption [16].…”

Section: Introductionmentioning

confidence: 99%

Second Harmonic Generation Exploiting Ultra-Stable Resistive Switching Devices for Secure Hardware Systems

Chen

Kiani

et al. 2022

IEEE Trans. Nanotechnology

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In the era of Big Data and Internet of Things (IoT), information security has emerged as an essential system and application metric. The information exchange among the ubiquitously connected smart electronic devices requires functioning reliably in harsh environments, which highlights the need for securing the hardware root of trust. In this work, by leveraging the uniform nonlinear resistive switching of emerging electroforming-free analog memristive device based on BiFeO 3 (BFO) thin film, the security-oriented hardware primitive (SoHP) system is developed and optimized with high-security level. The SoHP system utilizes the distinguishable power conversion efficiency generated at second and higher harmonics in low resistance state (memristor with diodelike behavior) and high resistance state (memristor with high resistive behavior) of memristive devices. By exploring the significant influence of writing bias and operational frequency in sourcing input voltage on the dynamic switching behavior of memristive device, the novel 2-memristor encoding scheme and 1-memristor decoding scheme are developed for SoHP system, which realizes a frequency enhancement of 4000 times in comparison to 1-memristor encoding scheme and 2-memristor decoding scheme. The encoded data bits that generated from physically implemented SoHP system pass diverse statistical test suites (i.e.

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Domain Wall Magnets for Embedded Memory and Hardware Security

Cited by 20 publications

References 20 publications

Hardware Security For and Beyond CMOS Technology

Hardware Security For and Beyond CMOS Technology

Hardware functional obfuscation with ferroelectric active interconnects

Second Harmonic Generation Exploiting Ultra-Stable Resistive Switching Devices for Secure Hardware Systems

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