Double-Gate Field-Effect Diode: A Novel Device for Improving Digital-and-Analog Performance

Hashemi, Seyed Amir Hossein; Pourmolla, Pezhman; Jit, Satyabrata

doi:10.1109/ted.2019.2955638

Cited by 9 publications

(2 citation statements)

References 26 publications

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“…The proposed device structure resembles a parallel N/P MOSFET combination with shared terminals (CG, PG and S/D) able to selectively be switched OFF combining the gates biasing. The use of both N-and P-type side terminals within the same device is not uncommon as found in bodycontacted devices (such as H-or T-gate structures [9]), gated P-I-N diodes (Field-Effect diodes) [10]- [12], G4-FETs [14] or sharp switching FETs [13], [15], [16]. It should be highlighted that the device operation principles do not require perfect shallow N-P junctions at S/D (as will be shown later), i.e., the N and P doping profiles at source (or drain) might be spaced to comply with the manufacturing process (see Fig.…”

Section: Introductionmentioning

confidence: 99%

Dual PN Source/Drain Reconfigurable FET for Fast and Low-Voltage Reprogrammable Logic

et al. 2020

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Schottky junction reconfigurable FETs suffer from limited output currents to drive the following stages, jeopardizing their viability for high-end applications. This drawback becomes dramatic at low voltages. In this work, an analogous novel low-bias reprogrammable device is presented. It features a dual PN doping at source and drain which improves the driving current density thanks to the presence of both electron and hole reservoirs within the same structure. 3D-TCAD results for this innovative device on advanced Silicon-on-Insulator technology are presented and compared with traditional reconfigurable FETs and CMOS structures.

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Section: Introductionmentioning

confidence: 99%

Dual PN Source/Drain Reconfigurable FET for Fast and Low-Voltage Reprogrammable Logic

et al. 2020

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“…It overcomes the disadvantages of S-FED and turns off properly for channel lengths below 40 nm. 17 Another modified structure termed SORI-FED was introduced which focuses on the reduction of OFF current by resisting SRH recombination by introducing a raised silicon box into the channel. 18 A Junction Less FED (JL-FED) is a modification that overcomes the shortcomings of both conventional FED as well as JL-FET.…”

mentioning

confidence: 99%

Modeling of Double-Gate Field-Effect Diodes for Analog Applications

Sharma

Panchanathan

Bantupalli

et al. 2021

ECS J. Solid State Sci. Technol.

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As technological trends impose device dimension limitations, exploring other devices apart from metal oxide semiconductor field effect transistor, due to short-channel effects, has become inevitable. Higher I ON /I OFF ratios and faster switching rates are quintessential characteristics for nanoelectronics. A field effect diode (FED) is one such device that exhibits greater drive current and low leakages when compared to silicon on insulator technology. Also, the FED fabrication process is compatible with complimentrary metal oxide semiconductor technology. Recently, several approaches have been proposed to tackle the low OFF current problem in FED such as Modified-FED and Side-Contacted FED. The FED structure proposed here is also believed to exhibit lesser short-channel effects, smaller OFF-state current, and higher ON-state current than a regular FED structure. We have explored the possible effects of material variation and work function engineering in our structure. Comprehensive analysis of the proposed device has also been done on some figures of merit such as subthreshold slope, energy-delay product, intrinsic gate delay, etc. thereby making this device suitable for electrostatic-discharge protection. Our numerical investigation promises FED's efficacy in future logic applications in the nanometre regime.

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A performance evaluation of a novel field-effect device as an alternative to the field-effect diode

2023

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Double-Gate Field-Effect Diode: A Novel Device for Improving Digital-and-Analog Performance

Cited by 9 publications

References 26 publications

Dual PN Source/Drain Reconfigurable FET for Fast and Low-Voltage Reprogrammable Logic

Dual PN Source/Drain Reconfigurable FET for Fast and Low-Voltage Reprogrammable Logic

Modeling of Double-Gate Field-Effect Diodes for Analog Applications

A performance evaluation of a novel field-effect device as an alternative to the field-effect diode

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