Double-Gate Two-Step Source/Drain Poly-Si Thin-Film Transistor

Abstract

A current improved and electric field reduced double-gate (DG) polycrystalline silicon thin-film transistor with two-step source/drain (DGTSD-TFT) design is proposed and demonstrated in this study. The two-step source/drain (TSD) design, which consists of a raised source/drain (RSD) area together with a partial gate overlapped lightly doped drain (P-GOLDD) structure, can lower the device drain electric field (DEF) to reveal a better device performance. Comparisons have been made with respect to a traditional single top gate (STG) device. The operation current of the proposed DGTSD-TFT is almost twice as large as that of the STG structure. The OFF-state leakage current and kink effect, as well as the ON/OFF current ratio for this double-gate and two-step source/drain structure, are also improved simultaneously because of a reduced DEF. A hot carrier stress test reveals that that two-step source/drain structure can achieve more stable device characteristics than the traditional device.

Performance dependence of self-aligned dual-gate poly-Si TFTs on localized defective regions

“…Low-temperature polycrystalline silicon (LTPS) has a long-range order. LTPS TFTs can exhibit a significantly higher µ and superior reliability [6][7][8]. In addition to n-type TFTs, p-type TFTs can also be realized using LTPS technology [8,9].…”

“…Recent simulation studies of poly-Si TFTs were reported in [6,[29][30][31]. A double-gate TFT was investigated in [6], where the poly-Si channel layer was controlled by a top gate and a bottom gate. However, influences of defects on the TFT performance were not studied.…”

“…A dramatic reduction in the hole concentration at the grain boundary protrusion site explains the decreased mobility. Above literature survey indicates that the TCAD simulation is important for investigation of poly-Si TFTs, and usually uniform bulk defects in the channel layer are considered when performaing the TCAD analysis [6,29,30]. Meanwhile, simulation study of dual-gate TFTs is seldom reported.…”