Dual-regulator dual-decoding-trimmer DRAM voltage limiter for burn-in test

Energy-aware design of embedded memories

“…Hence, data retention power reduction in DRAMs entails both leakage and switching power minimization. Reducing the power of on-chip voltage converters such as VDC, voltage-up (V dh ) converter [Itoh et al 1995], substrate back-bias (V bb ) generator, V ref generator [Horiguchi et al 1991], and half-V dd generator minimize the static current component. The switching current component can be reduced by extending the refresh time and reducing the refresh charge [Itoh et al 1995].…”

Low Power Memory Design

“…The reference voltage, V REF, must be accurate over wide variations of V DD' process, and temperature for stable operation, because the voltage level determines the amount of cell signal charge as well as the speed performance. A band-gap V REF generator and a CMOS V REF generator [16] utilizing the threshold voltage difference have been proposed to meet the requirements. A bum-in operation with the application of a high stress voltage to devices is indispensable in VLSI production, both for reliability testing and for chip screening.…”

“…A bum-in operation with the application of a high stress voltage to devices is indispensable in VLSI production, both for reliability testing and for chip screening. For this purpose, the V REF generator is designed to output a raised voltage when V DD is higher than the value for normal operation [16]. Otherwise, the fixed voltage fails to apply a higher stress voltage.…”

“…With regard to a V REF generator, a static V REF generator has been proposed. However, a practical generator consumes more than 10 IlA, because it needs a gain-trimmable amplifier circuit in order to get an accurate voltage level [16]. Gain trimming with poly silicon resistance makes it difficult to get high resistance values of over 1 MQ without a large area and poor noise immunity against substrate bounce.…”

Highly reliable testing of ULSI memories with on-chip voltage-down converters

“…However, implementing a VDC circuit independent of the process parameters is difficult. Therefore, designers introduced the tunable VDC circuit with fuse trimming.3s6, 8 But choosing a tuning procedure is not easy because the parameters of trimmed material also change with process parameter fluctuations. Thus, we need a reliable int.Vcc tuning technique with high throughput to compensate for process parameter fluctuations.…”