Dynamic Dictionary-Based Data Compression for Level-1 Caches

Κεραμίδας, Γεώργιος; Aisopos, Konstantinos

doi:10.1007/11682127_9

Cited by 8 publications

(4 citation statements)

References 27 publications

Supporting

Mentioning

Contrasting

Unclassified

Order By: Relevance

“…Afterwards, the most probable elements are coded with [8, 10, 12, 16, 17, 23, 28, 29, 35, 40, 48-50, 52, 53, 56, 63, 64, 66, 78, 82, 83, 88, 93] Zero-content compression [14,35,41,50,52,57,62,78,81] Frequent value compression (FVC) [35,52,59,60,67,70] Base delta immediate (BDI) compression [16,23,35,48,51,63,83,93,94] LZ and variants [6,7,9,17,19,20,22 [8,12] Compression in GPUs [89,93,94] Use of compiler [9,21,43,44,72,73,93] fewer number of bits than those which are least probable. Thus, Huffman coding uses a variablelength coding scheme.…”

Section: Compression Algorithmsmentioning

confidence: 99%

A Survey Of Architectural Approaches for Data Compression in Cache and Main Memory Systems

Mittal

Vetter

2016

IEEE Trans. Parallel Distrib. Syst.

View full text Add to dashboard Cite

As the number of cores on a chip increase and key applications become even more data-intensive, memory systems in modern processors have to deal with increasingly large amount of data. In face of such challenges, data compression presents as a promising approach to increase effective memory system capacity and also provide performance and energy advantages. This paper presents a survey of techniques for using compression in cache and main memory systems. It also classifies the techniques based on key parameters to highlight their similarities and differences. It discusses compression in CPUs and GPUs, conventional and non-volatile memory (NVM) systems, and 2D and 3D memory systems. We hope that this survey will help the researchers in gaining insight into the potential role of compression approach in memory components of future extreme-scale systems.

show abstract

Section: Compression Algorithmsmentioning

confidence: 99%

A Survey Of Architectural Approaches for Data Compression in Cache and Main Memory Systems

Mittal

Vetter

2016

IEEE Trans. Parallel Distrib. Syst.

View full text Add to dashboard Cite

show abstract

“…A decompressor, typically between the cache and the CPU, translates the compressed instructions to the normal program instructions before execution on the CPU. Various compression algorithms have been employed on CPU data caches as well [29,30,51,53].…”

Section: Saving Energy Using Compressionmentioning

confidence: 99%

Energy and performance evaluation of lossless file data compression on server systems

Kothiyal

Tarasov

Sehgal

et al. 2009

Proceedings of SYSTOR 2009: The Israeli Experimental Systems Conference

View full text Add to dashboard Cite

of the Thesis Energy and Performance Evaluation of Lossless File Data Compression on Computer Systems by Rachita Kothiyal Master of Science in Computer ScienceStony Brook University 2009Data compression has been claimed to be an attractive solution to save energy consumption in high-end servers and data centers. However, there has not been a study to explore this. In this thesis, we present a comprehensive evaluation of energy consumption for various file compression techniques implemented in software. We apply various compression tools available on Linux to a variety of data files, and we try them on server, workstation and laptop class systems. We compare their energy and performance results against raw reads and writes. Our results reveal that software based data compression cannot be considered as a universal solution to reduce energy consumption. Various factors like the type of the data file, the compression tool being used, the read-to-write ratio of the workload, and the hardware configuration of the system impact the efficacy of this technique. We found that in some cases, compression can save as much as 33% energy and improve performance by 37.85%. However, in other cases we found that compression can increase energy consumption 7 times and deteriorate performance 4 fold.iii To my parents and my sisters, Ruchi and Rachna.

show abstract

“…Moreover, finding the critical word is not trivial when the data is compressed; thus, decompression must happen before it is located and sent. In spite of that, the closest cache to the core can still be compressed to reduce its miss rate if decompression is immediate [41,70,86]. Ultimately, other techniques can be applied to reduce the average decompression time [5,50,51].…”

mentioning

confidence: 99%

Understanding Cache Compression

Carvalho

Seznec

2021

ACM Trans. Archit. Code Optim.

View full text Add to dashboard Cite

Hardware cache compression derives from software-compression research; yet, its implementation is not a straightforward translation, since it must abide by multiple restrictions to comply with area, power, and latency constraints. This study sheds light on the challenges of adopting compression in cache design—from the shrinking of the data until its physical placement. The goal of this article is not to summarize proposals but to put in evidence the solutions they employ to handle those challenges. An in-depth description of the main characteristics of multiple methods is provided, as well as criteria that can be used as a basis for the assessment of such schemes. It is expected that this article will ease the understanding of decisions to be taken for the design of compressed systems and provide directions for future work.

show abstract

Dynamic Dictionary-Based Data Compression for Level-1 Caches

Cited by 8 publications

References 27 publications

A Survey Of Architectural Approaches for Data Compression in Cache and Main Memory Systems

A Survey Of Architectural Approaches for Data Compression in Cache and Main Memory Systems

Energy and performance evaluation of lossless file data compression on server systems

Understanding Cache Compression

Contact Info

Product

Resources

About